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US5025741A
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Method of making semiconductor integrated circuit device with polysilicon contacts
Assignee: Micron Memory Japan Ltd
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Filing: 1989-04-28
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Granted: 1991-06-25
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Expires: 2009-04-28
Abstract
Abstract A semiconductor integrated circuit device having a wiring line of aluminum film or aluminum alloy film covered with a silicon insulation film and connected to the semiconductor region formed on the principal surface of a single crystal silicon substrate, with a polycrystalline silicon film interposed, wherein said silicon film is a polycrystalline silicon film composed of large crystal grains which is formed by depositing in amorphous state and then heat-treating the deposited film, said polycrystalline silicon film reduces the amount of silicon atoms which separates out in said wiring line. Also said wiring line is provided with a shielding film which is disposed between said insulation film and at least the upper surface and lower surface of said wiring line and which prevents silicon atoms from separating out from said insulation film. A process for manufacturing a semiconductor integrated circuit device which comprises the steps of depositing an amorphous silicon film on the principal surface of said semiconductor region, and performing heat treatment on said silicon film, thereby converting the amorphous silicon film into a polycrystalline silicon film composed of large crystal grains.
Inventors
- 👤 Naokatsu Suwanai
- 👤 Osamu Tsuchiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 09:43
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P14/00; H10P14/20; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3451; H10P14/3452; H10P14/3456; H10P14/38; H10P14/3802; H10P14/40; H10P14/416; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
161 words
A method of manufacturing a semiconductor integrated circuit device, said method comprising: a step of forming a first semiconductor film in an amorphous state on one of source and drain regions of a MISFET in a semiconductor region on a semiconductor substrate; a step of performing heat-treatment on said first semiconductor film in the amorphous state, thereby changing the amorphous state into a polycrystalline state, crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of an aluminum film, on the first semiconductor film in the polycrystalline state, wherein said first wiring line is connected to said first semiconductor film in the polycrystalline state on one of the source and drain regions of said MISFET of said semiconductor region.
Claim 2
Independent Claim
161 words
A method of manufacturing a semiconductor integrated circuit device, said method comprising: a step of forming a first semiconductor film in an amorphous state on one of source and drain regions of a MISFET in a semiconductor region on a semiconductor substrate; a step of performing heat-treatment on said first semiconductor film in the amorphous state, thereby changing the amorphous state into a polycrystalline state, crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of an aluminum film, on the first semiconductor film in the polycrystalline state, wherein said first wiring line is connected to said first semiconductor film in the polycrystalline state on one of the source and drain regions of said MISFET of said semiconductor region.
Claim 3
Dependent Claim
36 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said first semiconductor film in amorphous state is an amorphous silicon film formed by CVD at a temperature lower than 600° C.
Claim 4
Dependent Claim
41 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said first semiconductor film becomes, after heat treatment step in the manufacturing process, a polycrystalline semiconductor film which is composed of crystal grains larger than 0.1 μm.
Claim 5
Dependent Claim
23 words
A method of manufacturing a semiconductor integrated circuit device according to claim 3, wherein the polycrystalline semiconductor film is a polycrystalline silicon film.
Claim 6
Dependent Claim
38 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said first wiring line is provided on the upper and lower surfaces thereof with a shielding film which is a film of high-melting metal.
Claim 7
Dependent Claim
23 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said first wiring line is an aluminum alloy film.
Claim 8
Dependent Claim
26 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said semiconductor region contains a capacitor connected to said MISFET in series.
Claim 9
Dependent Claim
57 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said first wiring line and said one of source and drain regions of said MISFET are connected to each other in a region which is self-aligned to a gate electrode of said MISFET and defined by a side wall of said gate electrode.
Claim 10
Dependent Claim
30 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said first semiconductor film is formed by chemical vapor deposition, with a thickness of 1500-2500 Å.
Claim 11
Dependent Claim
31 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the grain size of the polycrystalline state of the first semiconductor film is greater than 0.2 μm.
Claim 12
Dependent Claim
22 words
A method of manufacturing a semiconductor integrated circuit device according to claim 10, wherein said grain size is greater than 0.3 μm.
Claim 13
Dependent Claim
27 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the aluminum film is made of aluminum alone or of an aluminum alloy.
Claim 14
Dependent Claim
25 words
A method of manufacturing a semiconductor integrated circuit device according to claim 12, wherein the aluminum alloy contains at least one of silicon and copper.
Claim 15
Dependent Claim
45 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the step of forming the first semiconductor film includes introducing an impurity so as to lower resistance of the first semiconductor film as compared to the resistance thereof without the impurity.
Claim 16
Dependent Claim
39 words
A method of manufacturing a semiconductor integrated circuit device according to claim 14, wherein the heat treatment includes at least one annealing treatment to lower resistance of the first semiconductor film and to form the source and drain region.
Claim 17
Dependent Claim
23 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the heat treatment includes at least one annealing treatment.
Claim 18
Dependent Claim
69 words
A method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said first semiconductor film, in said amorphous state, is also provided on a part of the semiconductor substrate other than said one of source and drain regions of said MISFET, so as to provide another portion of said first semiconductor film, said another portion also being heat-treated so as to change into the polycrystalline structure.
Claim 19
Dependent Claim
45 words
A method of manufacturing a semiconductor integrated circuit device according to claim 17, wherein said another portion is provided on the semiconductor substrate at a location of a capacitor of the semiconductor integrated circuit device, the another portion forming a lower electrode of the capacitor.
Claim 20
Dependent Claim
49 words
A method of manufacturing a semiconductor integrated circuit device according to claim 17, wherein said another portion is provided in electrical contact with the other of the source and drain regions of said MISFET, and wherein said another portion forms a resistance element of the semiconductor integrated circuit device.
Claim 21
Dependent Claim
62 words
A method of manufacturing a semiconductor integrated circuit device according to claim 17, wherein said device has at least two semiconductor regions provided in the semiconductor substrate, wherein said another portion is provided in electrical contact with another semiconductor region of said at least two semiconductor regions, and wherein said another portion forms a resistance element of the semiconductor integrated circuit device.
Claim 22
Independent Claim
220 words
A method of manufacturing a semiconductor integrated circuit device including a semiconductor region having a MISFET and a resistance element connected to said MISFET, said method comprising: a step of forming a first semiconductor film in an amorphous state simultaneously on first and second regions of said semiconductor region in a semiconductor substrate; a step of selectively introducing an impurity into said first semiconductor film, in the first region and not in the second region, in the amorphous state; a step of performing heat treatment on said first semiconductor film in the amorphous state, said first semiconductor film changing from the amorphous state into a polycrystalline state; crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of aluminum, on said first semiconductor film in said first region; wherein said resistance element made of said first semiconductor film in the polycrystalline state is formed in said second region, and said first wiring line is connected to said first semiconductor film in the polycrystalline state on one of source and drain regions of said MISFET in the first region.
Claim 23
Independent Claim
220 words
A method of manufacturing a semiconductor integrated circuit device including a semiconductor region having a MISFET and a resistance element connected to said MISFET, said method comprising: a step of forming a first semiconductor film in an amorphous state simultaneously on first and second regions of said semiconductor region in a semiconductor substrate; a step of selectively introducing an impurity into said first semiconductor film, in the first region and not in the second region, in the amorphous state; a step of performing heat treatment on said first semiconductor film in the amorphous state, said first semiconductor film changing from the amorphous state into a polycrystalline state; crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of aluminum, on said first semiconductor film in said first region; wherein said resistance element made of said first semiconductor film in the polycrystalline state is formed in said second region, and said first wiring line is connected to said first semiconductor film in the polycrystalline state on one of source and drain regions of said MISFET in the first region.
Claim 24
Dependent Claim
23 words
A method of manufacturing a semiconductor integrated circuit device according to claim 21, wherein said resistance element and said MISFET constitute an SRAM.
Claim 25
Dependent Claim
67 words
A method of manufacturing a semiconductor integrated circuit device according to claim 21, wherein the heat treatment is performed such that the first semiconductor film is changed into the polycrystalline state having crystal grains that are sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller.
Claim 26
Independent Claim
205 words
A method of manufacturing a semiconductor integrated circuit device including a semiconductor region having a MISFET and a capacitance connected to said MISFET, said method comprising: a step of forming a first semiconductor film in an amorphous state simultaneously on first and second regions of the semiconductor region in a semiconductor substrate; a step of introducing an impurity into the first semiconductor film, in both the first and second regions, in the amorphous state; a step of performing heat-treatment on said first semiconductor film in the amorphous state, the first semiconductor film changing from the amorphous state into a polycrystalline state; crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of aluminum, on the first semiconductor film in the first region, wherein the first semiconductor film on the second region is an electrode of said capacitor, and said first wiring line is connected to the first semiconductor film on one of source and drain regions of said MISFET in the first region.
Claim 27
Independent Claim
205 words
A method of manufacturing a semiconductor integrated circuit device including a semiconductor region having a MISFET and a capacitance connected to said MISFET, said method comprising: a step of forming a first semiconductor film in an amorphous state simultaneously on first and second regions of the semiconductor region in a semiconductor substrate; a step of introducing an impurity into the first semiconductor film, in both the first and second regions, in the amorphous state; a step of performing heat-treatment on said first semiconductor film in the amorphous state, the first semiconductor film changing from the amorphous state into a polycrystalline state; crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of aluminum, on the first semiconductor film in the first region, wherein the first semiconductor film on the second region is an electrode of said capacitor, and said first wiring line is connected to the first semiconductor film on one of source and drain regions of said MISFET in the first region.
Claim 28
Dependent Claim
26 words
A method of manufacturing a semiconductor integrated circuit device according to claim 24, wherein said MISFET and said capacitor constitute a memory cell of a DRAM.
Claim 29
Independent Claim
154 words
A method of manufacturing a semiconductor integrated circuit device having at least one semiconductor region provided in a semiconductor substrate, comprising: a step of forming a first semiconductor film in an amorphous state on a semiconductor region of said integrated circuit device; a step of performing heat-treatment on said first semiconductor film in the amorphous state, thereby changing the amorphous state into a polycrystalline state, the crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of aluminum, on the first semiconductor film in the polycrystalline state, wherein the first wiring line is connected to said first semiconductor film in the polycrystalline state on said semiconductor region of said integrated circuit device.
Claim 30
Independent Claim
154 words
A method of manufacturing a semiconductor integrated circuit device having at least one semiconductor region provided in a semiconductor substrate, comprising: a step of forming a first semiconductor film in an amorphous state on a semiconductor region of said integrated circuit device; a step of performing heat-treatment on said first semiconductor film in the amorphous state, thereby changing the amorphous state into a polycrystalline state, the crystal grains of the first semiconductor film in the polycrystalline state being sufficiently large so as to reduce a substitution reaction between semiconductor material of the first semiconductor film and aluminum, as compared to the substitution reaction where the crystal grains are smaller; and a step of forming a first wiring line, of aluminum, on the first semiconductor film in the polycrystalline state, wherein the first wiring line is connected to said first semiconductor film in the polycrystalline state on said semiconductor region of said integrated circuit device.
Claim 31
Dependent Claim
29 words
A method of manufacturing a semiconductor integrated circuit device according to claim 26, wherein the first semiconductor film in the polycrystalline state has crystal grains larger than 0.1 μm.
Claim 32
Dependent Claim
22 words
A method of manufacturing a semiconductor integrated circuit device according to claim 26, wherein the first semiconductor film is a silicon film.
Claim 33
Dependent Claim
62 words
A method of manufacturing a semiconductor integrated circuit device according to claim 26, wherein said first semiconductor film, in said amorphous state, is also provided on a part of the semiconductor substrate other than said semiconductor region, so as to provide another portion of said first semiconductor film, said another portion also being heat-treated so as to change into the polycrystalline structure.
Claim 34
Dependent Claim
45 words
A method of manufacturing a semiconductor integrated circuit device according to claim 29, wherein said another portion is provided on the semiconductor substrate at a location of a capacitor of the semiconductor integrated circuit device, the another portion forming a lower electrode of the capacitor.
References Cited (Backward Citations)
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