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US5025310A Expired / Lapsed US ⏱️ 0.0 years remaining

Clock pulse generator capable of being switched to process both standard and non-standard television signals

Assignee: Hitachi Ltd
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Filing: 1990-03-23
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Granted: 1991-06-18
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Expires: 2010-03-23
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Abstract

Abstract A clock pulse generator has a first clock pulse generator for generating a burst lock clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generator for generating a line lock clock pulse signal synchronized with a horizontal synchronizing signal contained in the video signal; a detection circuit for detecting whether or not the video signal is a standard signal; and a phase control circuit for synchronizing the phase of the line lock clock pulse signal with the phase of the burst lock clock pulse signal when the detection circuit determines that the video signal is a standard signal. The line lock clock pulse signal is supplied to a synchronizing signal generator, a selected one of the burst lock clock pulse signal and the line lock clock pulse signal is supplied to a signal processing circuit when the detection circuit determines that the video signal is a standard signal, and the line lock clock pulse signal is supplied to the signal processing circuit when the detection circuit determines that the video signal is a non-standard signal.

Inventors

  • 👤 Hiroshi Sekiya
  • 👤 Toshiyuki Kurita
  • 👤 Nobufumi Nakagaki
  • 👤 Toshinori Murata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 18:50
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/64; H04N9/641; H04N9/44; H04N9/45

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 211 words
A clock pulse generator comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in said video signal; a detection means for detecting whether said video signal accords with a predetermined standard or not; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; and said second clock pulse signal being supplied to a synchronizing signal generating means to make said synchronizing signal generating means generate a synchronizing signal based on said second clock pulse signal, the selected clock pulse signal being supplied from said selection means to a signal processing circuit to make said signal processing circuit perform signal processing upon said video signal based on said selected clock pulse signal.
Claim 2
Dependent Claim 211 words
A clock pulse generator comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in said video signal; a detection means for detecting whether said video signal accords with a predetermined standard or not; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; and said second clock pulse signal being supplied to a synchronizing signal generating means to make said synchronizing signal generating means generate a synchronizing signal based on said second clock pulse signal, the selected clock pulse signal being supplied from said selection means to a signal processing circuit to make said signal processing circuit perform signal processing upon said video signal based on said selected clock pulse signal.
Claim 3
Dependent Claim 171 words
A clock pulse generator comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in said video signal; a detection means for detecting whether said video signal accords with a predetermined standard or not; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means makes a decision that said video signal accords with said standard; and said second clock pulse signal being supplied to a synchronizing signal generating means to make said synchronizing signal generating means generate a synchronizing signal based on said second clock pulse signal, said second clock pulse signal being supplied to a signal processing circuit to make said signal processing circuit perform signal processing upon said video signal based on said second clock pulse signal.
Claim 4
Dependent Claim 171 words
A clock pulse generator comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in said video signal; a detection means for detecting whether said video signal accords with a predetermined standard or not; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means makes a decision that said video signal accords with said standard; and said second clock pulse signal being supplied to a synchronizing signal generating means to make said synchronizing signal generating means generate a synchronizing signal based on said second clock pulse signal, said second clock pulse signal being supplied to a signal processing circuit to make said signal processing circuit perform signal processing upon said video signal based on said second clock pulse signal.
Claim 5
Dependent Claim 50 words
A clock pulse generator according to claim 1, in which said phase control means includes a switching means for switching over between phase synchronization and phase asynchronization of said second clock pulse signal with said first clock pulse signal based on the result of the detection through said detection means.
Claim 6
Dependent Claim 50 words
A clock pulse generator according to claim 2, in which said phase control means includes a switching means for switching over between phase synchronization and phase asynchronization of said second clock pulse signal with said first clock pulse signal based on the result of the detection through said detection means.
Claim 7
Dependent Claim 103 words
A clock pulse generator according to claim 1, in which said second clock pulse generating means includes an oscillation means for performs oscillation in synchronism with the horizontal synchronizing signal contained in said video signal so as to output said second clock pulse signal as its oscillation output, and in which when the phase of said second clock pulse signal is synchronized with the phase of said first clock pulse signal, said phase control means directly controls said oscillation means so as to make the phase of said second clock pulse signal be synchronized with the phase of said first clock pulse signal.
Claim 8
Dependent Claim 103 words
A clock pulse generator according to claim 2, in which said second clock pulse generating means includes an oscillation means for performing oscillation in synchronism with the horizontal synchronizing signal contained in said video signal so as to output said second clock pulse signal as its oscillation output, and in which when the phase of said second clock pulse signal is synchronized with the phase of said first clock pulse signal, said phase control means directly controls said oscillation means so as to make the phase of said second clock pulse signal be synchronized with the phase of said first clock pulse signal.
Claim 9
Dependent Claim 74 words
A clock pulse generator according to claim 1, in which when the phase of said second clock pulse signal is synchronized with the phase of said first clock pulse signal, said phase control means controls the phase of said second clock pulse signal outputted from said second clock pulse generating means so as to make the phase of said second clock pulse signal be synchronized with the phase of said first clock pulse signal.
Claim 10
Dependent Claim 74 words
A clock pulse generator according to claim 2, in which when the phase of said second clock pulse signal is synchronized with the phase of said first clock pulse signal, said phase control means controls the phase of said second clock pulse signal outputted from said second clock pulse generating means so as to make the phase of said second clock pulse signal be synchronized with the phase of said first clock pulse signal.
Claim 11
Dependent Claim 224 words
A clock pulse generation circuit comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in said video signal; a detection means for detecting whether said video signal accords with a predetermined standard or not; a delay means for delaying the output signal of said detection means so that said output signal does not include an equivalent pulse period of said video signal; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means through said delay means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; a synchronizing signal generating means for generating a synchronizing signal; a signal processing means for performing signal processing; and said second clock pulse signal being supplied to said synchronizing signal generating means, the output clock pulse signal from said selection means being supplied to said signal processing means.
Claim 12
Dependent Claim 224 words
A clock pulse generation circuit comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in said video signal; a detection means for detecting whether said video signal accords with a predetermined standard or not; a delay means for delaying the output signal of said detection means so that said output signal does not include an equivalent pulse period of said video signal; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means through said delay means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; a synchronizing signal generating means for generating a synchronizing signal; a signal processing means for performing signal processing; and said second clock pulse signal being supplied to said synchronizing signal generating means, the output clock pulse signal from said selection means being supplied to said signal processing means.
Claim 13
Dependent Claim 210 words
A clock pulse generation circuit comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a suppressing means for suppressing an equivalent pulse signal contained in said video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in the output signal of said suppressing means; a detection means for detecting whether said video signal accords with a predetermined standard or not; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; a synchronizing signal generating means for generating a synchronizing signal; a signal processing means for performing signal processing; and said second clock pulse signal being supplied to said synchronizing signal generating means, the output clock pulse signal from said selection means being supplied to said signal processing means.
Claim 14
Dependent Claim 210 words
A clock pulse generation circuit comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a suppressing means for suppressing an equivalent pulse signal contained in said video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in the output signal of said suppressing means; a detection means for detecting whether said video signal accords with a predetermined standard or not; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; a synchronizing signal generating means for generating a synchronizing signal; a signal processing means for performing signal processing; and said second clock pulse signal being supplied to said synchronizing signal generating means, the output clock pulse signal from said selection means being supplied to said signal processing means.
Claim 15
Dependent Claim 27 words
A clock pulse generation circuit according to claim 10, in which said suppressing means performs suppression based on a vertical synchronizing pulse signal of said video signal.
Claim 16
Dependent Claim 232 words
A clock pulse generation circuit comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a suppressing means for suppressing an equivalent pulse signal contained in said video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in the output signal of said suppressing means; a detection means for detecting whether said video signal accords with a predetermined standard or not; a delay means for delaying the output signal of said detection means so that said output signal does not include the vicinity of an equivalent pulse period of said video signal; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means through said delay means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; a synchronizing signal generating means for generating a synchronizing signal; and a signal processing means for performing signal processing, said signal processing means being supplied with the output clock pulse signal from said selection means.
Claim 17
Dependent Claim 232 words
A clock pulse generation circuit comprising: a first clock pulse generating means for generating a first clock pulse signal synchronized with a color burst signal contained in a video signal; a suppressing means for suppressing an equivalent pulse signal contained in said video signal; a second clock pulse generating means for generating a second clock pulse signal synchronized with a horizontal synchronizing signal contained in the output signal of said suppressing means; a detection means for detecting whether said video signal accords with a predetermined standard or not; a delay means for delaying the output signal of said detection means so that said output signal does not include the vicinity of an equivalent pulse period of said video signal; a phase control means for synchronizing the phase of said second clock pulse signal with the phase of said first clock pulse signal when said detection means through said delay means makes a decision that said video signal accords with said standard; a selection means supplied with said first and second clock pulse signals and for selecting one of said first and second clock pulse signals in accordance with the result of the detection through said detection means; a synchronizing signal generating means for generating a synchronizing signal; and a signal processing means for performing signal processing, said signal processing means being supplied with the output clock pulse signal from said selection means.

References Cited (Backward Citations)

US3904823A Cited
US4613827A Cited
US4860090A Cited
US4847678A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-06-17 1994-12-17 1995-06-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-06-17 1998-12-17 1999-06-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-06-17 2002-12-17 2003-06-18 $7700.00 Window Closed / Lapsed

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