US5022074A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital echo suppressor
Assignee: Rockwell Firstpoint Contact Corp
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Filing: 1985-07-01
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Granted: 1991-06-04
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Expires: 2005-07-01
Abstract
Abstract A digital echo suppression circuit in a four-wire digital telephony circuit having an echo from a local or remote connection to a two-wire circuit or other echo source. The invention incorporates a simple method of using the sample pairs from the first and second sampling circuit to produce a control signal from a control circuit. If the subscriber signal is "louder" than the network signal, then the subscriber signal is passed through. If the network signal is louder than the subscriber signal, the interrupter is activated and a zero level is substituted for the subscriber signal in transmissions toward the network. The invention uses the scheme of comparing instantaneous signal amplitude and using the larger amplitude to set a threshold value. The signal setting the threshold then remains the "loudest" until such time as the other signal can exceed the threshold. The threshold is slowly decremented, but the original signal may refresh the threshold to a higher level if a new peak value replaces the old threshold value with the new peak value. The identity of the input network or subscriber producing the threshold is stored. If the current threshold is the result of a network signal, the interrupter is activated and echo is suppressed. If the current threshold is the result of a network signal, the interrupter is activated and echo is suppressed. If the current threshold is the result of a subscriber signal sample, then the interrupter is deactivated and subscriber signals are transmitted onward toward the network.
Inventors
- 👤 David C. Nicholas
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 13:18
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/20
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
440 words
A digital echo suppression circuit for use in a digital four-wire circuit having a network port and a subscriber port, each network and subscriber port having an input and an output, said digital echo suppression circuit comprising: first means for establishing a communication channel from the network port input to the subscriber port output having at least a first shift register; second means for establishing a communication channel from the subscriber port input to the network port output having at least a second shift register in series with a means for interrupting said second channel means; means for selecting a selected signal from either the first or second shift register means; threshold means for storing only one said selected signal, said threshold means having a load input and a decrement input; means for comparing said selected signal with contents of said stored threshold means and outputting a resulting signal; control means for receiving a first control signal, a second control signal and said resulting signal and having a means for generating a load command to said threshold means; means for storing said selected signal in said stored threshold means based on the result of said comparison; means for storing an identity of said selected signal stored in said threshold means; means for transmitting to said interrupter means a control signal corresponding to said stored identity in response to said load command, said means for interrupting operating to interrupt the second channel means depending on the identity stored in said identity storage means; and means for reducing said selected signal stored in said threshold storage means over time, said means for selecting having parallel selectors, having a first input operatively connected to a parallel output of said first shift register, and having a second input operatively connected to a parallel output of said second shift register, and having a control input for receiving a switching control signal and having an output, said control means and said storage means having a first AND gate having a first input for receiving a first digital control signal, having a second input operatively connected to said output of said means for comparing and having an output; a second AND gate having a second input for receiving a second digital control signal, having a first input operatively connected to said output of said means for comparing and having an output; and an OR gate having a first input operatively connected to said output of said first AND gate, having a second input operatively connected to said output of said second AND gate and having an output operatively connected to said load input of said threshold means.
Claim 2
Dependent Claim
440 words
A digital echo suppression circuit for use in a digital four-wire circuit having a network port and a subscriber port, each network and subscriber port having an input and an output, said digital echo suppression circuit comprising: first means for establishing a communication channel from the network port input to the subscriber port output having at least a first shift register; second means for establishing a communication channel from the subscriber port input to the network port output having at least a second shift register in series with a means for interrupting said second channel means; means for selecting a selected signal from either the first or second shift register means; threshold means for storing only one said selected signal, said threshold means having a load input and a decrement input; means for comparing said selected signal with contents of said stored threshold means and outputting a resulting signal; control means for receiving a first control signal, a second control signal and said resulting signal and having a means for generating a load command to said threshold means; means for storing said selected signal in said stored threshold means based on the result of said comparison; means for storing an identity of said selected signal stored in said threshold means; means for transmitting to said interrupter means a control signal corresponding to said stored identity in response to said load command, said means for interrupting operating to interrupt the second channel means depending on the identity stored in said identity storage means; and means for reducing said selected signal stored in said threshold storage means over time, said means for selecting having parallel selectors, having a first input operatively connected to a parallel output of said first shift register, and having a second input operatively connected to a parallel output of said second shift register, and having a control input for receiving a switching control signal and having an output, said control means and said storage means having a first AND gate having a first input for receiving a first digital control signal, having a second input operatively connected to said output of said means for comparing and having an output; a second AND gate having a second input for receiving a second digital control signal, having a first input operatively connected to said output of said means for comparing and having an output; and an OR gate having a first input operatively connected to said output of said first AND gate, having a second input operatively connected to said output of said second AND gate and having an output operatively connected to said load input of said threshold means.
Claim 3
Dependent Claim
21 words
The circuit described in claim 1 wherein said means for storing an identity of said selected signal is a flip-flop circuit.
Claim 4
Dependent Claim
49 words
The circuit described in claim 1 wherein said means for interrupting comprises: serial selector having a data input operatively connected to an output of said shift register of said second channel means, having an output and a control input operatively connected to said output of said means for transmitting.
Claim 5
Dependent Claim
41 words
The circuit described in claim 3 wherein said means for interrupting further comprises a one bit shift register having an input operatively connected to said output of said serial selector and has an output operatively connected to said network port output.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-06-03 | 1994-12-03 | 1995-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-06-03 | 1998-12-03 | 1999-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-06-03 | 2002-12-03 | 2003-06-04 | $7700.00 | Window Closed / Lapsed |