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US5021787A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital-analog converter for conversion of law A- encoded digital signals into analog signals

Assignee: Texas Instruments Inc
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Filing: 1990-05-03
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Granted: 1991-06-04
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Expires: 2010-05-03
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Abstract

Abstract Digital-analog converter intended to convert into analog signals digital signals formed of sign bits, of step bits and of segment bits, particularly signals coded by data compression according to law A, the said converter comprising a sign generator (4), intended to receive the sign bit of the said digital signal, a step generator (7), connected to the output of the sign generator and intended to receive the step bits of the said digital signal and to a segment generator (8) connected to the step generator and intended to receive the segment bits of the said digital signal, characterized in that the segment generator (8) is connected to the sign generator by means of the step generator (7) only.

Inventors

  • 👤 Yves Leduc

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 06:18
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/664; H03M1/68; H03M1/74; H03M1/80; H03M1/802; H03M1/804

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 316 words
A digital-analog converter for converting digital signals formed of sign bits, of step bits, and of segment bits into analog signals, wherein the digital signals have been encoded by data compression in accordance with Law A, said converter comprising: sign generator means for receiving the sign bit of the digital signal to be converted, said sign generator means including a reference voltage source and a ground source and having first and second outputs for providing first and second reference signals as selectively derived from said reference voltage source and said ground source in dependence upon the sign bit of said digital signal as received thereby; step generator means for receiving the step bits of aid digital signal and being coupled to the output of said sign generator means for receiving said first and second reference signals as inputs and providing a step reference signal as a processed reference signal output in dependence upon said step bits of said digital signal as received thereby in conjunction with said first and second outputs from said sign generator means; and segment generator means for receiving the segment bits of said digital signal, said segment generator means being coupled to the output of the said step generator means for receiving the processed reference signal as output therefrom and being operably connected to said sign generator means only via said step generator means, said segment generator means having an output on which ana analog signal as converted from said digital signal is provided, the output voltage provided as an analog signal at the output of said segment generator means being related to the reference voltage as provided by said reference voltage source of said sign generator means in accordance with the expression: OUTPUT=(+/-).G'.(1/64).G''.(1/64).VREF, wherein G'=(1,3,5,7. . . 671 or 63); and G''=(1,2,4,8. . . 32or 64) are the gains of the step generator means and of the segment generator means, respectively.
Claim 2
Dependent Claim 316 words
A digital-analog converter for converting digital signals formed of sign bits, of step bits, and of segment bits into analog signals, wherein the digital signals have been encoded by data compression in accordance with Law A, said converter comprising: sign generator means for receiving the sign bit of the digital signal to be converted, said sign generator means including a reference voltage source and a ground source and having first and second outputs for providing first and second reference signals as selectively derived from said reference voltage source and said ground source in dependence upon the sign bit of said digital signal as received thereby; step generator means for receiving the step bits of aid digital signal and being coupled to the output of said sign generator means for receiving said first and second reference signals as inputs and providing a step reference signal as a processed reference signal output in dependence upon said step bits of said digital signal as received thereby in conjunction with said first and second outputs from said sign generator means; and segment generator means for receiving the segment bits of said digital signal, said segment generator means being coupled to the output of the said step generator means for receiving the processed reference signal as output therefrom and being operably connected to said sign generator means only via said step generator means, said segment generator means having an output on which ana analog signal as converted from said digital signal is provided, the output voltage provided as an analog signal at the output of said segment generator means being related to the reference voltage as provided by said reference voltage source of said sign generator means in accordance with the expression: OUTPUT=(+/-).G'.(1/64).G''.(1/64).VREF, wherein G'=(1,3,5,7. . . 671 or 63); and G''=(1,2,4,8. . . 32or 64) are the gains of the step generator means and of the segment generator means, respectively.
Claim 3
Dependent Claim 139 words
A digital-analog converter as set forth in claim 1, wherein said step generator means comprises a capacitor network including a plurality of capacitors of values corresponding to the analog signals to be generated in dependence upon the encoded digital signal to be converted, a plurality of switches operably associated with said plurality of capacitors defining said capacitor network and selectively operable in accordance with the encoded digital signals to be converted for selecting capacitors of said capacitor network to be connected to the first and second outputs of said sign generator means, an amplifier connected to said plurality of capacitors included in said capacitor network, and a control switch coupled to said amplifier and actuated in response to a phase control signal for regulating said amplifier improvising the processed reference signal as an output from said step generator means.
Claim 4
Dependent Claim 37 words
A digital-analog converter as set forth in claim 2, wherein said plurality of capacitors included in said capacitor network of said step generator means have capacitance values equal to C, C, 2C, 4C, 8C, 16C, 32C respectively.
Claim 5
Dependent Claim 142 words
A digital-analog converter as set forth in claim 2, wherein said segment generator means comprises a second capacitor network including a second plurality of capacitors connected to the output of said step generator means, a second plurality of witches operably associated with said second capacitor network and actuable for selecting certain ones of said second plurality of capacitors according to the analog voltages to be generated in dependence upon the encoded segment bits of said digital signal to be converted as applied to said second plurality of switches, a second amplifier connected to said second plurality of capacitors included in said second capacitor network, and a second control switch coupled to said second amplifier and actuated in response to a phase control signal in regulating the output of said second amplifier of said segment generator means for providing the converted analog signal.
Claim 6
Dependent Claim 40 words
A digital-analog converter as set forth in claim 4, wherein said second plurality of capacitors included in said second capacitor network of said segment generator means have capacitance values equal to C, C, 2C, 4C, 8C, 16C and 32C respectively.

References Cited (Backward Citations)

US4195282A Cited
US4311988A Cited
US4404544A Cited
US4468654A Cited
US4651132A Cited
US4507650A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-06-03 1994-12-03 1995-06-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-06-03 1998-12-03 1999-06-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-06-03 2002-12-03 2003-06-04 $7700.00 Window Closed / Lapsed

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