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US5020079A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for generating a minimum-shift-keying signal

Assignee: Verizon Patent and Licensing Inc
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Filing: 1989-11-17
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Granted: 1991-05-28
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Expires: 2009-11-17
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Abstract

Abstract Apparatus for generating an MSK signal by using a dual modulus frequency divider which divides an incoming digital clock signal of frequency f 0 by the factors n and (n+1) in dependence on the data type of the data to be transmitted and in which the frequency f 0 , the data rate f d and the factor n are such as to satisfy the relationship f d =f 0 ·2/(n(n+1)).

Inventors

  • 👤 Jan Vancraeynest

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 14:03
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/20; H04L27/2003; H04L27/2007; H04L27/2014

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 210 words
Apparatus for generating an MSK signal indicative of data comprised of first and second data types and whose data rate corresponds to a frequency f d , comprising: means for generating a digital clock signal of preselected frequency f 0 ; frequency divider means adapted to be responsive to said data and responsive to said digital clock signal for generating said MSK signal by dividing the frequency f 0 of said digital clock signal by a first integer n when said data is of said first data type and for dividing the frequency f 0 of said digital clock signal by a second integer equal to (n+1) when said data is of said second data type, said integer n being such as to satisfy the relationship f d =f 0 ·2/(n(n+1)); a local oscillator for generating a local oscillator signal at a frequency f LO which is higher than that of said frequency divider means; means for multiplying said MSK signal generated by said frequency divider means by said local oscillator signal; and said means for generating said digital clock signal being responsive to said local oscillator signal and comprising further divider means for dividing the frequency f LO of said local oscillator signal to generate said digital clock signal.
Claim 2
Dependent Claim 210 words
Apparatus for generating an MSK signal indicative of data comprised of first and second data types and whose data rate corresponds to a frequency f d , comprising: means for generating a digital clock signal of preselected frequency f 0 ; frequency divider means adapted to be responsive to said data and responsive to said digital clock signal for generating said MSK signal by dividing the frequency f 0 of said digital clock signal by a first integer n when said data is of said first data type and for dividing the frequency f 0 of said digital clock signal by a second integer equal to (n+1) when said data is of said second data type, said integer n being such as to satisfy the relationship f d =f 0 ·2/(n(n+1)); a local oscillator for generating a local oscillator signal at a frequency f LO which is higher than that of said frequency divider means; means for multiplying said MSK signal generated by said frequency divider means by said local oscillator signal; and said means for generating said digital clock signal being responsive to said local oscillator signal and comprising further divider means for dividing the frequency f LO of said local oscillator signal to generate said digital clock signal.
Claim 3
Dependent Claim 56 words
Apparatus in accordance with claim 1 further comprising: further divider means responsive to said digital clock signal for dividing the frequency of said digital clock signal by the factor n(n+1)/2; and means for generating said data at said frequency f d , said data generating means being responsive to the signal from said further divider means.
Claim 4
Dependent Claim 18 words
Apparatus in accordance with claim 1 wherein: said frequency divider means is a digital dual modulus frequency divider.
Claim 5
Dependent Claim 22 words
Apparatus in accordance with claim 3 wherein: said frequency divider means and further frequency divider means are implemented as one single state-machine.
Claim 6
Dependent Claim 7 words
Apparatus in accordance claim 1 wherein: n≧4.
Claim 7
Dependent Claim 19 words
Apparatus in accordance with claim 1 further comprising: filter means for filtering the output signal of said multiplying means.
Claim 8
Dependent Claim 8 words
Apparatus in accordance with claim 6 wherein: n≧4.
Claim 9
Dependent Claim 11 words
Apparatus in accordance with claim 1 wherein: said data is digital.
Claim 10
Dependent Claim 22 words
Apparatus in accordance with claim 8 wherein: said first data type is "1" data and said second data type is "0" data.
Claim 11
Dependent Claim 89 words
Apparatus in accordance with claim 1 wherein: said further frequency divider means divides the frequency f LO of said local oscillator signal by an integer N, and wherein the relationship between the local oscillator frequency f LO , the frequency f RF of the upper and lower sidebands of the signal from said multiplying means and the integers N and n is as follows: f.sub.RF =f.sub.LO (1±(2n+1)/(2n(n+1)N) where the + sign corresponds to the upper sideband frequency and the - sign the lower sideband frequency of the multiplied signal.

References Cited (Backward Citations)

US3731233A Cited
US3761625A Cited
US3993868A Cited
US4068198A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-05-27 1994-11-26 1995-05-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-05-27 1998-11-26 1999-05-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-05-27 2002-11-26 2003-05-28 $7700.00 Window Closed / Lapsed

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