US3731233A
Expired / Lapsed
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Minimum shift keying modulating apparatus
Assignee: Collins Radio Co
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Filing: 1971-11-17
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Granted: 1973-05-01
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Expires: 1991-11-17
Abstract
Abstract A minimum shift keying transmitter utilizing a voltage controlled oscillator and logic circuitry for altering the frequency output of the oscillator in accordance with the logic level of the binary data to be supplied while preventing phase discontinuities in the output signal.
Inventors
- 👤 W Hutchinson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 09:47
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/20; H04L27/2003; H04L27/2007; H04L27/2014
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
145 words
Data modulating apparatus comprising, in combination: voltage controlled frequency signal generating means including control input means and signal output means; first means for supplying a carrier frequency signal; second means, including output means, connected to said signal output means of said signal generating means and to said first means for receiving signals therefrom, said second means supplying signals at said output means thereof indicative of the difference frequency of the signals supplied thereto; third means for supplying modulating binary data; fourth means for supplying clock signals; and phase detecting fifth means connected to said second, third, and fourth means for receiving signals therefrom and connected to said control input means of said signal generating means for supplying thereto a control signal indicative of said difference frequency after phase detection with respect to said clock signals and selective amplitude filtration in accordance with said binary data.
Claim 2
Dependent Claim
145 words
Data modulating apparatus comprising, in combination: voltage controlled frequency signal generating means including control input means and signal output means; first means for supplying a carrier frequency signal; second means, including output means, connected to said signal output means of said signal generating means and to said first means for receiving signals therefrom, said second means supplying signals at said output means thereof indicative of the difference frequency of the signals supplied thereto; third means for supplying modulating binary data; fourth means for supplying clock signals; and phase detecting fifth means connected to said second, third, and fourth means for receiving signals therefrom and connected to said control input means of said signal generating means for supplying thereto a control signal indicative of said difference frequency after phase detection with respect to said clock signals and selective amplitude filtration in accordance with said binary data.
Claim 3
Dependent Claim
40 words
Apparatus as claimed in claim 1 wherein said second means includes means for doubling the frequency received from said signal generating means and further includes means for mixing said doubled frequency signal with the signal received from said first means.
Claim 4
Dependent Claim
45 words
Apparatus as claimed in claim 2 wherein said second means includes a low-pass filter for providing said difference frequency, said signal generating means supplying a frequency modulated output which varies from said carrier frequency by one-fourth the data rate as supplied by said third means.
Claim 5
Dependent Claim
67 words
Apparatus as claimed in claim 1 wherein: the clock signals and the binary data supplied by said fourth and third means, respectively, is supplied at the same rate; and said phase detecting means includes first and second phase detectors for detecting said difference frequency at the positive and negative peaks thereof for providing first and second phase detected signals which are used in the selective amplitude filtration.
Claim 6
Dependent Claim
76 words
Apparatus as claimed in claim 1 wherein said phase detection means includes: first and second combinations of phase detectors and filters from which said selective amplitude filtration is selected; and logic circuitry such that supplied binary data logic 1 signals supply a first amplitude filtered signal to said signal generating means as a control signal and supply the second amplitude filtered signal as the control signal when said binary data is representative of a logic 0.
Claim 7
Dependent Claim
177 words
Apparatus as claimed in claim 5 wherein said logic circuitry includes: sixth and seventh means for supplying the difference amplitude filtered signals; differential limiting means connected to said sixth and seventh means for providing a limited output indicative of the relative polarity between the input signals received from said sixth and seventh means; exclusive OR gate means connected for receiving the output of said differential limiting means and for receiving said binary data from said third means and providing output gating signals; and first and second AND gate means for receiving said signals from said sixth and seventh means, respectively, and for gating said signals therefrom through said gate means in accordance with gating signals received from said exclusive OR gate means whereby a logic 1 binary data signal from said third means passes as the control signal to said generating means the more positive of the signals from said sixth and seventh means and a logic 0 binary signal from said third means passes the less positive of the signals from said sixth and seventh means.
Claim 8
Independent Claim
166 words
The method of providing a frequency shift keyed signal of f0 + or - R/4 from a voltage controlled oscillator using a carrier of frequency f0 and data and clock signals synchronized at a rate R comprising the steps of: doubling the carrier frequency to produce a signal of 2f0 Hz; doubling the frequency shift keyed signal to provide a signal of 2f0 + or - R/2 Hz; mixing the frequency doubled signals; filtering the mixed signals to provide an output of R/2 Hz; dividing the clock signal to provide first and second opposite phase detection signals; phase detecting said filter R/2 Hz signal in accordance with each of said opposite phase detection signals to provide first and second amplitude signals; filtering each of said first and second amplitude signals to provide first and second control signals; and supplying one of said first and second control signals to control the frequency of the voltage controlled oscillator in accordance with the logic level of the data signal.
Claim 9
Independent Claim
166 words
The method of providing a frequency shift keyed signal of f0 + or - R/4 from a voltage controlled oscillator using a carrier of frequency f0 and data and clock signals synchronized at a rate R comprising the steps of: doubling the carrier frequency to produce a signal of 2f0 Hz; doubling the frequency shift keyed signal to provide a signal of 2f0 + or - R/2 Hz; mixing the frequency doubled signals; filtering the mixed signals to provide an output of R/2 Hz; dividing the clock signal to provide first and second opposite phase detection signals; phase detecting said filter R/2 Hz signal in accordance with each of said opposite phase detection signals to provide first and second amplitude signals; filtering each of said first and second amplitude signals to provide first and second control signals; and supplying one of said first and second control signals to control the frequency of the voltage controlled oscillator in accordance with the logic level of the data signal.
Claim 10
Dependent Claim
162 words
Apparatus for providing a frequency shift keyed signal which is binary data modulated with respect to a reference frequency f0 by + or - R/4 where R is the data rate comprising, in combination: oscillator means for supplying an output signal which is controlled in frequency in accordance with an input control voltage; means for supplying a carrier frequency reference signal; frequency doubling and combining means connected to said last named means and to said oscillator means for providing an output signal indicative of the difference frequency obtainable by combining frequency doubled versions of said reference carrier frequency signal and the output of said oscillator means; binary data supplying means having first and second logic levels; phase detector means connected to the last two named means for supplying one of first and second phase detected control signals to said oscillator means in accordance with the logic level of the binary data, the phase detection occurring with respect to two opposite phase signals.
Claim 11
Dependent Claim
162 words
Apparatus for providing a frequency shift keyed signal which is binary data modulated with respect to a reference frequency f0 by + or - R/4 where R is the data rate comprising, in combination: oscillator means for supplying an output signal which is controlled in frequency in accordance with an input control voltage; means for supplying a carrier frequency reference signal; frequency doubling and combining means connected to said last named means and to said oscillator means for providing an output signal indicative of the difference frequency obtainable by combining frequency doubled versions of said reference carrier frequency signal and the output of said oscillator means; binary data supplying means having first and second logic levels; phase detector means connected to the last two named means for supplying one of first and second phase detected control signals to said oscillator means in accordance with the logic level of the binary data, the phase detection occurring with respect to two opposite phase signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-30 | 1976-10-30 | 1977-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-30 | 1980-10-30 | 1981-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-30 | 1984-10-30 | 1985-05-01 | $7700.00 | Window Closed / Lapsed |