High current hermetic package including an internal foil and having a lead extending through the package lid and a packaged semiconductor chip

Claim 2

A packaged semiconductor chip comprising: a contact pad on a first surface of said chip; a conductive foil aligned with and bonded to said contact pad; a lid including an electrically insulating substrate having first and second major surfaces and an aperture therein, said substrate disposed with said first major surface toward said chip with said aperture disposed in alignment with said conductive foil; a conductive protrusion electrically continuous with said foil extending into said aperture; and a package base; said lid being bonded to said package base in a manner to enclose said chip and said conductive foil within said package.

Claim 3

The packaged chip recited in claim 1 wherein: said conductive protrusion is integral with said foil.

Claim 4

The packaged chip recited in claim 1 wherein: said conductive protrusion comprises a conductive pellet bonded to said foil.

Claim 5

The packaged chip recited in claim 3 wherein: said conductive pellet is solderless bonded to said foil.

Claim 6

The packaged chip recited in claim 1 wherein: said foil is bonded to said contact pad by an intermediate conductive material.

Claim 7

The packaged chip recited in claim 5 wherein: said intermediate conductive material comprises an array of conductive bumps bonded to said contact pad.

Claim 8

The packaged chip recited in claim 6 wherein: said intermediate conductive material comprises solder.

Claim 9

The packaged chip recited in claim 6 wherein: said intermediate conductive material comprises gold.

Claim 10

The packaged chip recited in claim 6 wherein: said conductive protrusion comprises a conductive pellet; and said array of conductive bumps does not extend into alignment with said conductive pellet.

Claim 11

The packaged chip recited in claim 6 further comprising: an external conductor adhered to said second major surface of said lid and electrically connected to said protrusion.

Claim 12

The packaged chip recited in claim 10 wherein: said external conductor is bonded to said protrusion.

Claim 13

The packaged chip recited in claim 11 wherein: said external conductor is solderless bonded to said protrusion.

Claim 14

The packaged chip recited in claim 11 wherein: said external conductor is soldered to said protrusion.

Claim 15

The packaged chip recited in claim 1 comprising: a plurality of said conductive protrusions each of which extends into an aperture in said substrate.

Claim 16

The packaged chip recited in claim 14 wherein: each of said protrusions comprises a conductive pellet.

Claim 17

The packaged chip recited in claim 15 wherein: said conductive pellet is roughly spherical.

Claim 18

The packaged chip recited in claim 15 wherein: said conductive pellet is a spheroid.

Claim 19

The packaged chip recited in claim 15 wherein: said conductive pellet is roughly cylindrical.

Claim 20

The packaged chip recited in claim 15 wherein: said conductive pellet is substantially a parallelepiped.

Claim 21

The packaged chip recited in claim 1 wherein: said chip is hermetically sealed within said package.

Claim 22

The packaged chip recited in claim 1 wherein: the area of said foil is substantially larger than the area of said aperture.

Claim 23

A packaged semiconductor chip comprising: a contact pad on a first surface of said chip; a conductive foil aligned with and bonded to said contact pad; a lid including an electrically insulating substrate having first and second major surfaces and an aperture therein, said substrate disposed with said first major surface toward said chip with said aperture disposed in alignment with said conductive foil; a conductive protrusion electrically continuous with said foil extending into said aperture and neither filling nor sealing said aperture; an external conductor adhered to said second major surface of said substrate, extending across and sealing said aperture and electrically connected to said protrusion; and a package base; said lid being bonded to said package base in a manner to enclose said chip and said conductive foil within said package.

Claim 24

A packaged semiconductor chip comprising: a contact pad on a first surface of said chip; a conductive foil aligned with and bonded to said contact pad; a lid including an electrically insulating substrate having first and second major surfaces and an aperture therein, said substrate disposed with said first major surface toward said chip with said aperture disposed in alignment with said conductive foil; a conductive protrusion electrically continuous with said foil extending into said aperture and neither filling nor sealing said aperture; an external conductor adhered to said second major surface of said substrate, extending across and sealing said aperture and electrically connected to said protrusion; and a package base; said lid being bonded to said package base in a manner to enclose said chip and said conductive foil within said package.

Claim 25

The packaged chip recited in claim 22 wherein: said external conductor is bonded to said protrusion.

Claim 26

The packaged chip recited in claim 23 wherein: said external conductor is solderless bonded to said protrusion.

Claim 27

The packaged chip recited in claim 23 wherein: said external conductor is soldered to said protrusion.

Claim 28

The packaged chip recited in claim 22 comprising: a plurality of devices contained within said package; a separate external conductor adhered to said second major surface of said substrate for each of said devices, each of said devices having a conductive foil aligned with and bonded to a contact pad thereon, each of said conductive foils having a conductive protrusion electrically continuous with that foil extending into an aperture in said lid and connected to the external conductor associated with that device.

Claim 29

The packaged chip recited in claim 26 wherein: said package includes an external control terminal having removable segments for isolating the control electrodes of selected devices.