Amorphous silicon thin film transistor with a depletion gate

Claim 1

An amorphous semiconductor thin film field effect transistor comprising: (a) an insulating substrate; (b) an accumulation gate electrode overlying said substrate; (c) a bottom insulating layer overlying said accumulation gate electrode and said insulating substrate; (d) an amorphous semiconductor channel layer overlying said bottom insulating layer; (e) a top insulating layer overlying a portion of said bottom insulating layer and being centered with respect to said accumulation gate electrode; (f) a source amorphous semiconductor layer and a drain amorphous semiconductor layer, said source and drain semiconductor layers being of a first conductivity type and overlying opposite portions of said top insulating layer and being in contact with respective opposite portions of said channel layer not covered by said top insulating layer, said source and drain semiconductor layers being separated from one another by an intermediate portion of said channel layer overlying said accumulation gate; (g) metallic source and drain electrodes overlying said source and drain semiconductor layers, respectively; and (h) a metallic depletion gate disposed on said top insulating layer and over said intermediate portion of said channel layer, said intermediate portion of said channel layer being juxtaposed between said accumulation gate and said depletion gate, said channel layer having charge carrier flow therethrough between said source and drain semiconductor layers that is enhanced by one potential on said accumulation gate and is depleted by an opposite potential on said depletion gate.