Polycrystalline silicon thin film transistor

Abstract

Abstract PURPOSE:To assure remarkable OFF resistance by a method wherein two gate electrodes are provided on the upper and lower part of a thin film semiconductor containing silicon crystalline particles with carrier movement larger than that of amorphous silicon. CONSTITUTION:A Cr film is vacuum-evaporated and processed on an insulating substrate 1 to form a lower gate electrode 2. Next an SiO2 insulating film 3 is formed further to form a silicon film 4. Again another SiO2 film 5 is formed and holes are made therein to form a source region and a drain region to be implanted with P<+> ion and B<+> ion respectively for forming an N<+> layer and P layer and later heat treatment. Then the SiO2 5 is formed as an insulating film for upper gate to make holes for electrode contacts. Finally overall surface evaporated down to Al electrode is formed into a source electrode 6, a drain electrode 7 and an upper gate electrode 8 by means of processing Al.

Inventors

• 👤 Tomoyoshi Mishima
• 👤 友義 三島
• 👤 Eiichi Maruyama
• 👤 瑛一 丸山
• 👤 Makoto Matsui
• 👤 誠 松井
• 👤 Yasuhiro Shiraki
• 👤 靖寛 白木
• 👤 Yoshimasa Murayama
• 👤 村山　良昌

Bibliographic Details