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US5016158A
Expired / Lapsed
US
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Parallel multi-inverter system and motor drive system using the same
Assignee: Hitachi Ltd
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Filing: 1990-06-27
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Granted: 1991-05-14
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Expires: 2010-06-27
Abstract
Abstract A parallel multi-inverter system including a plurality of inverters connected in parallel to each other through one or more parallel reactors, wherein output voltages of the inverters are controlled on the basis of the polarity of an output voltage command signal and a comparison result between a value obtained by converting the output voltage command signal into a positive one and a carrier signal to reduce harmonic components of the line-to-line voltages, and further two different switching modes to set the output voltage of the system zero are equally used to prevent a circulating current from flowing through the parallel reactors during each zero potential period of the output voltage of the system.
Inventors
- 👤 Takayuki Matsui
- 👤 Toshiaki Okuyama
- 👤 Kazuaki Tobari
- 👤 Yuzuru Kubota
- 👤 Junichi Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 16:10
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/483; H02M7/49
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
169 words
A parallel multi-inverter system including a plurality of inverters connected to each other through parallel reactors to convert a DC voltage of a DC power source into an AC voltage according to phase output voltage command signal, said system further comprising: an absolute-value circuit for inverting a negative part of said output voltage command signal into positive; a comparison circuit for comparing an output of said absolute-value circuit with a carrier signal; a polarity discrimination circuit for discriminating a polarity of the output voltage command signal; a first AND circuit for performing a logical AND operation of an output of said polarity discrimination circuit and an output of said comparison circuit; a polarity inversion circuit for inverting the output of the polarity discrimination circuit; and a second AND circuit for performing a logical AND of an output of said polarity inversion circuit and the output of the comparison circuit, wherein an output voltage of said multi-inverter system is controlled according to an output signal of said second AND circuit.
Claim 2
Dependent Claim
169 words
A parallel multi-inverter system including a plurality of inverters connected to each other through parallel reactors to convert a DC voltage of a DC power source into an AC voltage according to phase output voltage command signal, said system further comprising: an absolute-value circuit for inverting a negative part of said output voltage command signal into positive; a comparison circuit for comparing an output of said absolute-value circuit with a carrier signal; a polarity discrimination circuit for discriminating a polarity of the output voltage command signal; a first AND circuit for performing a logical AND operation of an output of said polarity discrimination circuit and an output of said comparison circuit; a polarity inversion circuit for inverting the output of the polarity discrimination circuit; and a second AND circuit for performing a logical AND of an output of said polarity inversion circuit and the output of the comparison circuit, wherein an output voltage of said multi-inverter system is controlled according to an output signal of said second AND circuit.
Claim 3
Dependent Claim
73 words
A parallel multi-inverter system as set forth in claim 1, wherein the output voltage of said multi-inverter system is positive when the outputs of said first and second AND circuits are both positive, the output voltage of the multi-inverter system is negative when the outputs of the first and second AND circuits are both negative, and is zero when the outputs of the first and second AND circuits are different from each other.
Claim 4
Dependent Claim
47 words
A parallel multi-inverter system as set forth in claim 2, further comprising inversion circuits for inverting the output signals of the first and second AND circuits at a predetermined period when the output signals of the first and second AND circuits are different from each other respectively.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-05-13 | 1994-11-12 | 1995-05-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-05-13 | 1998-11-12 | 1999-05-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-05-13 | 2002-11-12 | 2003-05-14 | $7700.00 | Window Closed / Lapsed |