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US5015600A
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Method for making integrated circuits
Assignee: STMicroelectronics NV
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Filing: 1990-01-25
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Granted: 1991-05-14
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Expires: 2010-01-25
Abstract
Abstract In a method for making integrated circuits, a semiconductor substrate is provided which carries a plurality of unconnected devices of a first device type at regularly spaced regions of the substrate and a plurality of unconnected devices of a secound, distinct device type at substantially all regions of the substrate other than those carrying devices of the first device type, and at least one interconnection layer is formed on the substrate to interconnect selected ones of the devices of the first device type and the devices of the second device type to define a plurality of integrated circuits. Pad regions may be formed over unconnected devices for connection of the integrated circuits to package terminals. The integrated circuits are separated by regions containing unconnected devices, and the semiconductor substrate may be scribed and broken or otherwise cut in these regions to separate the integrated circuits.
Inventors
- 👤 Frederick C. Livermore
- 👤 John G. Hogeboom
- 👤 Go S. Sunatori
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 11:56
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/70; G03F7/70425; G03F7/70433; H; H10; H10P; H10P54/00; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/43
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
96 words
A method for making integrated circuits, comprising: providing a semiconductor substrate carrying a plurality of unconnected drive devices at regularly spaced identical regions of the substrate and plurality of unconnected logic devices at substantially all regions of the substrate other than the regions carrying drive devices; and forming at least one interconnection layer on the substrate to interconnect selected ones of the drive devices and the logic devices to define a plurality of integrated circuits, each integrated circuit being capable of performing a desired electronic function, the integrated circuits being separated by regions containing unconnected devices.
Claim 2
Independent Claim
96 words
A method for making integrated circuits, comprising: providing a semiconductor substrate carrying a plurality of unconnected drive devices at regularly spaced identical regions of the substrate and plurality of unconnected logic devices at substantially all regions of the substrate other than the regions carrying drive devices; and forming at least one interconnection layer on the substrate to interconnect selected ones of the drive devices and the logic devices to define a plurality of integrated circuits, each integrated circuit being capable of performing a desired electronic function, the integrated circuits being separated by regions containing unconnected devices.
Claim 3
Dependent Claim
33 words
A method as defined in claim 1, comprising providing a plurality of unconnected electrostatic discharge protection devices in at least some of the regularly spaced regions in which the drive devices are carried.
Claim 4
Dependent Claim
59 words
A method as defined in claim 1, comprising providing a plurality of unconnected drive devices selected from the group consisting of bipolar transistors and MOS drive transistors at regularly spaced identical regions of a semiconductor substrate and providing a plurality of unconnected CMOS transistor pairs at substantially all regions of the substrate other than those regions carrying bipolar transistors.
Claim 5
Dependent Claim
81 words
A method as defined in claim 1, comprising providing a plurality of unconnected drive devices selected from the group consisting of bipolar transistors and MOS drive devices, and electrostatic discharge protection devices from the group consisting of diodes, resistors, punch through devices and active switches at regularly spaced identical regions of a semiconductor substrate and providing a plurality of unconnected CMOS transistor pairs at substantially all regions of the substrate other than those regions carrying bipolar transistors and electrostatic protection diodes.
Claim 6
Dependent Claim
24 words
A method as defined in claim 1, comprising forming bonding pad regions over unconnected devices for connection of the integrated circuits with package terminals.
Claim 7
Dependent Claim
33 words
A method, as defined in claim 1, further comprising scribing the substrate in the regions containing unconnected devices between the integrated circuits and breaking the substrate where scribed to separate the integrated circuits.
Claim 8
Dependent Claim
27 words
A method as defined in claim 1, further comprising cutting the substrate in the regions containing unconnected devices between the integrated circuits to separate the integrated circuits.
Claim 9
Dependent Claim
54 words
A method as defined in claim 1, comprising forming a plurality of interconnection layers to interconnect selected ones of the drive devices and the logic devices to define a plurality of integrated circuits, each integrated circuit being capable of performing a desired electronic function, the integrated circuits being separated by regions containing unconnected devices.
Claim 10
Independent Claim
118 words
A method for making integrated circuits, comprising: providing a semiconductor substrate carrying a plurality of unconnected devices of a first device type at regularly spaced identical regions of the substrate and a plurality of unconnected devices of a second, distinct device type at substantially all regions of the substrate other than the regions carrying devices of the first device type; and forming at least one interconnection layer on the substrate to interconnect selected ones of the devices of the first device type and the devices of the second device type to define a plurality of integrated circuits, each integrated circuit being capable of performing a desired electronic function, the integrated circuits being separated by regions containing unconnected devices.
Claim 11
Independent Claim
118 words
A method for making integrated circuits, comprising: providing a semiconductor substrate carrying a plurality of unconnected devices of a first device type at regularly spaced identical regions of the substrate and a plurality of unconnected devices of a second, distinct device type at substantially all regions of the substrate other than the regions carrying devices of the first device type; and forming at least one interconnection layer on the substrate to interconnect selected ones of the devices of the first device type and the devices of the second device type to define a plurality of integrated circuits, each integrated circuit being capable of performing a desired electronic function, the integrated circuits being separated by regions containing unconnected devices.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-05-13 | 1994-11-12 | 1995-05-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-05-13 | 1998-11-12 | 1999-05-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-05-13 | 2002-11-12 | 2003-05-14 | $7700.00 | Window Closed / Lapsed |