Method of generating an image scanning clock signal for an optical scanning device by selecting one of a plurality of out-of-phase clock signals

Claim 1

A method of generating an image scanning clock signal in an optical scanning device in which a scanning region of a given surface is scanned with a light beam cyclically deflected by a rotating light deflector, and the light beam is detected by a light sensor which is located outside of the scanning region and which generates a synchronizing signal upon detection of the light beam, said method comprising the steps of: generating a reference clock signal having a frequency f equal to that of the image scanning clock signal with a reference clock generator, and corrective clock signals having a frequency Nf (N is a natural number of at least 2) with a corrective clock generator; applying said reference clock signal and said corrective clock signals to shift registers to enable the shift registers to generate a plurality of out-of-phase clock signals having said frequency f; applying said plurality of clock signals from said shift registers to a latch circuit to latch the clock signals therein in response to the synchronizing signal from said light sensor for enabling the latch circuit to output signals corresponding to the respective latched clock signals;

Claim 2

A method of generating an image scanning clock signal in an optical scanning device in which a scanning region of a given surface is scanned with a light beam cyclically deflected by a rotating light deflector, and the light beam is detected by a light sensor which is located outside of the scanning region and which generates a synchronizing signal upon detection of the light beam, said method comprising the steps of: generating a reference clock signal having a frequency f equal to that of the image scanning clock signal with a reference clock generator, and corrective clock signals having a frequency Nf (N is a natural number of at least 2) with a corrective clock generator; applying said reference clock signal and said corrective clock signals to shift registers to enable the shift registers to generate a plurality of out-of-phase clock signals having said frequency f; applying said plurality of clock signals from said shift registers to a latch circuit to latch the clock signals therein in response to the synchronizing signal from said light sensor for enabling the latch circuit to output signals corresponding to the respective latched clock signals;