Patent US5012202A successfully refreshed from Google Patents.
US5012202A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low impedance automatic gain control circuit
Assignee: Qorvo US Inc
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Filing: 1990-03-15
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Granted: 1991-04-30
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Expires: 2010-03-15
Abstract
Abstract An optical receiver circuit for an incoming optical signal having a variable power level includes an optical detector for receiving the optical signal and generating a current therefrom which varies with the optical signal power level. The current so generated is applied to a transimpedance amplifier. An automatic gain control (AGC) drive circuit is connected around the amplifier thereby increasing its dynamic range. The AGC drive circuit drives a FET which has one side thereof connected to the transimpedance amplifier for shunting current from the input thereof. A negative feedback circuit comprising an amplifier is connected across the FET, which comprises the resistive feedback element, thus reducing the FET resistance by a factor of 1+T, where T is the feedback circuit loop gain.
Inventors
- 👤 Stewart S. Taylor
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 08:19
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3084; H03F; H03F3/00; H03F3/04; H03F3/08; H03F3/082; H03F3/45; H03F3/45071; H03F3/45076
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
150 words
An apparatus for amplifying a signal comprising: a main amplifier having an input terminal and an output terminal; an automatic gain control (AGC) drive circuit having an input terminal operatively connected to the output terminal of said main amplifier, said AGC drive circuit developing a signal related to the signal appearing on the output terminal of said main amplifier when said apparatus is in operative condition; a FET having a gate operatively connected to said AGC drive circuit, said FET having a side operatively connected to the input terminal of said main amplifier for shunting current from the input terminal of said main amplifier responsive to the signal developed by said AGC drive circuit; and a differential amplifier connected across said FET, said differential amplifier having a pair of input terminals and an output terminal operatively connected to another side of said FET for lowering the impedance of said FET.
Claim 2
Independent Claim
150 words
An apparatus for amplifying a signal comprising: a main amplifier having an input terminal and an output terminal; an automatic gain control (AGC) drive circuit having an input terminal operatively connected to the output terminal of said main amplifier, said AGC drive circuit developing a signal related to the signal appearing on the output terminal of said main amplifier when said apparatus is in operative condition; a FET having a gate operatively connected to said AGC drive circuit, said FET having a side operatively connected to the input terminal of said main amplifier for shunting current from the input terminal of said main amplifier responsive to the signal developed by said AGC drive circuit; and a differential amplifier connected across said FET, said differential amplifier having a pair of input terminals and an output terminal operatively connected to another side of said FET for lowering the impedance of said FET.
Claim 3
Dependent Claim
49 words
The apparatus of claim 1 wherein one of the input terminals of said differential amplifier is operatively connected to the input terminal of said main amplifier and the other input terminal of said differential amplifier is placed at a preselected bias potential when said apparatus is in operative condition.
Claim 4
Dependent Claim
45 words
The apparatus of claim 2 wherein said main amplifier comprises a transimpedance amplifier, said differential amplifier comprises a voltage amplifier and said bias potential is substantially equal to the potential at the input terminal of said transimpedance amplifier when said apparatus is in operative condition.
Claim 5
Dependent Claim
20 words
The apparatus of claim 1 wherein said differential amplifier further includes an output buffer having a relatively low output impedance.
Claim 6
Dependent Claim
194 words
An optical receiver circuit for an incoming optical signal having a variable power level comprising: an optical detector for receiving said optical signal and generating a current therefrom which varies with the optical signal power level; a transimpedance amplifier having an input terminal and an output terminal; means for applying such a current to said input terminal; an automatic gain control (AGC) drive circuit having an input terminal operatively connected to the output terminal of said transimpedance amplifier, said AGC drive circuit developing a control signal which varies in response to the voltage signal appearing on the output terminal of said transimpedance amplifier when said apparatus is in operative condition; a FET having a gate operatively connected to said AGC drive circuit, said FET having a side operatively connected to the input terminal of said transimpedance amplifier for shunting current from the input terminal of said transimpedance amplifier responsive to the signal developed by said AGC drive circuit; and a differential amplifier connected across said FET, said differential amplifier having a pair of input terminals and an output terminal operatively connected to another side of said FET for lowering the impedance of said FET.
Claim 7
Dependent Claim
194 words
An optical receiver circuit for an incoming optical signal having a variable power level comprising: an optical detector for receiving said optical signal and generating a current therefrom which varies with the optical signal power level; a transimpedance amplifier having an input terminal and an output terminal; means for applying such a current to said input terminal; an automatic gain control (AGC) drive circuit having an input terminal operatively connected to the output terminal of said transimpedance amplifier, said AGC drive circuit developing a control signal which varies in response to the voltage signal appearing on the output terminal of said transimpedance amplifier when said apparatus is in operative condition; a FET having a gate operatively connected to said AGC drive circuit, said FET having a side operatively connected to the input terminal of said transimpedance amplifier for shunting current from the input terminal of said transimpedance amplifier responsive to the signal developed by said AGC drive circuit; and a differential amplifier connected across said FET, said differential amplifier having a pair of input terminals and an output terminal operatively connected to another side of said FET for lowering the impedance of said FET.
Claim 8
Dependent Claim
49 words
The apparatus of claim 5 wherein one of the input terminals of said differential amplifier is operatively connected to the input terminal of said transimpedance amplifier and the other input terminal of said differential amplifier is placed at a preselected bias potential when said apparatus is in operative condition.
Claim 9
Dependent Claim
37 words
The apparatus of claim 6 wherein said differential amplifier comprises a voltage amplifier and said bias potential is substantially equal to the potential at the input terminal of said transimpedance amplifier when said apparatus i inoperative condition.
Claim 10
Dependent Claim
22 words
The optical receiver circuit of claim 5 wherein said differential amplifier further includes an output buffer having a relatively low output impedance.
Claim 11
Independent Claim
123 words
A method for increasing the dynamic range of a main amplifier having an output terminal for providing an output voltage proportional to an input current received at an input terminal, said method comprising the steps of: generating a control signal which varies in response to the amplifier output voltage; applying the control signal to a FET having an impedance which varies in response to the control signal; connecting one side of said FET to the input terminal of the main amplifier to shunt input current therethrough; driving one side of said FET with a second amplifier; and using the signal on another side of said FET as a feedback signal for said second amplifier, such that the impedance of said FET is lowered.
Claim 12
Independent Claim
123 words
A method for increasing the dynamic range of a main amplifier having an output terminal for providing an output voltage proportional to an input current received at an input terminal, said method comprising the steps of: generating a control signal which varies in response to the amplifier output voltage; applying the control signal to a FET having an impedance which varies in response to the control signal; connecting one side of said FET to the input terminal of the main amplifier to shunt input current therethrough; driving one side of said FET with a second amplifier; and using the signal on another side of said FET as a feedback signal for said second amplifier, such that the impedance of said FET is lowered.
Claim 13
Dependent Claim
50 words
The method of claim 9 wherein said second amplifier is a differential amplifier having an output terminal, a first input terminal to which the feedback signal is applied and a second input terminal, said method further comprising the step of placing a preselected bias potential on said second input terminal.
Claim 14
Dependent Claim
43 words
The method of claim 10 wherein the step of placing a preselected bias potential on said second input terminal comprises the step of placing a bias potential thereon which is substantially equal to the potential at the input terminal of the main amplifier.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-04-29 | 1994-10-29 | 1995-04-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-04-29 | 1998-10-29 | 1999-04-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-04-29 | 2002-10-29 | 2003-04-30 | $7700.00 | Window Closed / Lapsed |