On-chip high voltage generator and regulator in an integrated circuit

Claim 2

An integrated circuit including a voltage supply comprising: first means for providing an output voltage on an output lead; a first lead for receiving a first voltage; a plurality of capacitors coupled in series between said output lead and said first lead, said plurality of capacitors serving as a voltage divider; a second lead coupled to a node between two of the capacitors within said plurality, said second lead providing a sense voltage responsive to said output voltage; second means for providing a reference voltage, said first means comprising means for comparing said sense voltage and said reference voltage and adjusting said output voltage in response thereto.

Claim 3

The circuit of claim 1 wherein said plurality capacitors comprises: an insulating layer; a first plurality of conductive layers formed over said insulating layer, each conductive layer within said plurality serving as a plate of at least one of said capacitors within said plurality of capacitors; a second plurality of conductive layers, a first one of said conductive layers within said second plurality serving as a first plate of a first capacitor within said plurality of capacitors and being formed over but insulated from a first portion of a first conductive layer within said first plurality, said first conductive layer within said first plurality serving as the second plate of said first capacitor and a first plate of a second capacitor within said plurality of capacitors, a second conductive layer within said second plurality of conductive layers being formed over a second portion of said first conductive layer within said first plurality and serving as a second plate of said second capacitor, said second conductive layer within said second plurality extending over but being insulated from at least a portion of a second conductive layer within said first plurality and serving as a first plate of a third capacitor within said plurality of capacitors, said second conductive layer within said first plurality serving as a second plate of said third capacitor.

Claim 4

The circuit of claim 1 wherein said first lead is oupled to ground.

Claim 5

An integrated circuit comprising a voltage multiplier, said voltage multiplier comprising: a first input terminal for receiving a first input voltage; an output terminal for providing output voltage; voltage means for generating said output voltage from said input voltage; a second input terminal for receiving a second input voltage; a third input terminal for receiving a third input voltage; a capacitive voltage divider coupled between said second and third input terminals for generating a reference signal on a reference lead in response to said second and third input voltages, said capacitive voltage divider comprising a plurality of capacitors having a first plate coupled to said reference lead; a plurality of switches, each switch having a lead coupled to the second plate of a uniquely associated one of said capacitors, each switch electrically coupling said second plate of said uniquely associated capacitor to either said second input terminal or said third input terminal; means for providing a sense signal having a magnitude responsive to said output voltage; and means for comparing said reference signal and said sense signal and generating therefrom a comparator output signal, said voltage means adjusting said output voltage in response to said comparator output signal.

Claim 6

An integrated circuit comprising a voltage multiplier, said voltage multiplier comprising: a first input terminal for receiving a first input voltage; an output terminal for providing output voltage; voltage means for generating said output voltage from said input voltage; a second input terminal for receiving a second input voltage; a third input terminal for receiving a third input voltage; a capacitive voltage divider coupled between said second and third input terminals for generating a reference signal on a reference lead in response to said second and third input voltages, said capacitive voltage divider comprising a plurality of capacitors having a first plate coupled to said reference lead; a plurality of switches, each switch having a lead coupled to the second plate of a uniquely associated one of said capacitors, each switch electrically coupling said second plate of said uniquely associated capacitor to either said second input terminal or said third input terminal; means for providing a sense signal having a magnitude responsive to said output voltage; and means for comparing said reference signal and said sense signal and generating therefrom a comparator output signal, said voltage means adjusting said output voltage in response to said comparator output signal.

Claim 7

The circuit of claim 4 wherein said first input voltage equals said second input voltage.

Claim 8

The circuit of claim 4 further comprising a register, the state of said switches being determined by data stored in said register.

Claim 9

A capacitor comprising: a first region of semiconductor material of a first conductivity type; a second region of semiconductor material of a second conductivity type opposite said first conductivity type formed within said first region, said second region serving as a first plate of said capacitor; a first conductive layer formed above but insulated from said second region; and a second conductive layer formed above but insulated from said first conductive layer, said second conductive layer serving as a second plate of said capacitor.

Claim 10

A capacitor comprising: a first region of semiconductor material of a first conductivity type; a second region of semiconductor material of a second conductivity type opposite said first conductivity type formed within said first region, said second region serving as a first plate of said capacitor; a first conductive layer formed above but insulated from said second region; and a second conductive layer formed above but insulated from said first conductive layer, said second conductive layer serving as a second plate of said capacitor.

Claim 11

The capacitor of claim 7 wherein said capacitor is part of a circuit comprising: a third region of said second conductivity type formed within said first region, said second region extending to substantially the same depth as said third region; a source region of said first conductivity type formed within said third region; a drain region of said first conductivity type formed within said third region, a channel extending between said source and drain regions; and a gate formed above said channel region.

Claim 12

A capacitor comprising: a first insulating layer; a first conductive layer formed on said first insulating layer; a second insulating layer formed on said first conductive layer; a second conductive layer formed on a first portion of said second insulating layer but not on a second portion of said second insulating layer, said second conductive layer serving as a first plate of said capacitor; and a third conductive layer formed on said second portion of said second insulating layer, said third conductive layer serving as a second plate of said capacitor.

Claim 13

A capacitor comprising: a first insulating layer; a first conductive layer formed on said first insulating layer; a second insulating layer formed on said first conductive layer; a second conductive layer formed on a first portion of said second insulating layer but not on a second portion of said second insulating layer, said second conductive layer serving as a first plate of said capacitor; and a third conductive layer formed on said second portion of said second insulating layer, said third conductive layer serving as a second plate of said capacitor.

Claim 14

The capacitor of claim 9 wherein said capacitor is part of a voltage multiplier in an integrated circuit.

Claim 15

The capacitor of claim 10 wherein said first insulating layer is part of the field insulation of an integrated circuit.