US5006920A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electrical components
Assignee: Telenorma Telefonbau und Normalzeit GmbH
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Filing: 1988-03-16
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Granted: 1991-04-09
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Expires: 2008-03-16
Abstract
Abstract An electronic modular unit such as an integrated semiconductor unit is disclosed. The inventive electronic unit can be bonded to a support or to another modular unit. For this purpose, the inventive unit is provided with projections or recesses so that units can mate with one another. The projections may be formed by an etching process. Electrical connections as well as mechanical connections between units may be achieved using the projections and recesses.
Inventors
- 👤 Wolfgang Schafer
- 👤 Hans Isert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 19:16
CPC Classifications
H; H05; H05K; H05K7/00; H05K7/02
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
139 words
In combination, a first modular micro-electronic unit comprising a first substrate, a first electronic circuit incorporated at a first major surface of said first substrate, and first etched mechanical mating means formed integrally with said first substrate at a second major surface of said first substrate oppositely disposed from said first major surface, and a second modular micro-electronic unit comprising a second substrate and second etched mechanical mating means formed on a major surface of said second substrate, said first and second mechanical mating means mating with each other to form a mechanical bond between said first and second modular micro-electronic units, wherein said first and second mating means include an electrically conducting material, said first and second mating means mating together to form both an electrical bond and a mechanical bond between said first and second micro-electronic units.
Claim 2
Dependent Claim
139 words
In combination, a first modular micro-electronic unit comprising a first substrate, a first electronic circuit incorporated at a first major surface of said first substrate, and first etched mechanical mating means formed integrally with said first substrate at a second major surface of said first substrate oppositely disposed from said first major surface, and a second modular micro-electronic unit comprising a second substrate and second etched mechanical mating means formed on a major surface of said second substrate, said first and second mechanical mating means mating with each other to form a mechanical bond between said first and second modular micro-electronic units, wherein said first and second mating means include an electrically conducting material, said first and second mating means mating together to form both an electrical bond and a mechanical bond between said first and second micro-electronic units.
Claim 3
Dependent Claim
17 words
The combination of claim 1 wherein said first and second substrate are formed from a semiconductor material.
Claim 4
Dependent Claim
17 words
The combination of claim 1 wherein said first and second substrate are formed from a ceramic material.
Claim 5
Dependent Claim
16 words
The combination of claim 1 wherein said first and second substrates are formed from different materials.
Claim 6
Dependent Claim
140 words
In combination, a first integrated semiconductor electronic unit comprising a first semiconductor substrate, a first integrated circuit incorporated integrally in said first semiconductor substrate, first mechanical mating means formed integrally with said first semiconductor substrate on a major surface thereof, and a second integrated semiconductor electronic unit comprising a second semiconductor substrate, a second integrated circuit incorporated integrally in said second semiconductor substrate and second mechanical mating means formed integrally with said second semiconductor substrate on a major surface thereof, said first and second mating means mating with each other to form a mechanical bond between said first and second semiconductor electronic units, wherein said first and second mating means include an electrically conducting material, said first and second mating means mating together to form a mechanical bond and an electrical connection between said first and second semiconductor electronic units.
Claim 7
Dependent Claim
140 words
In combination, a first integrated semiconductor electronic unit comprising a first semiconductor substrate, a first integrated circuit incorporated integrally in said first semiconductor substrate, first mechanical mating means formed integrally with said first semiconductor substrate on a major surface thereof, and a second integrated semiconductor electronic unit comprising a second semiconductor substrate, a second integrated circuit incorporated integrally in said second semiconductor substrate and second mechanical mating means formed integrally with said second semiconductor substrate on a major surface thereof, said first and second mating means mating with each other to form a mechanical bond between said first and second semiconductor electronic units, wherein said first and second mating means include an electrically conducting material, said first and second mating means mating together to form a mechanical bond and an electrical connection between said first and second semiconductor electronic units.
Claim 8
Dependent Claim
14 words
The combination of claim 5 wherein said first and second mating means are etched.
Claim 9
Dependent Claim
31 words
The combination of claim 5 wherein said first mating means comprises projections formed integrally with said first substrate and said second mating means comprises recesses formed integrally in said second substrate.
Claim 10
Dependent Claim
36 words
The combination of claim 5 wherein said first mating means comprises projections and said second mating means comprises recesses, said projections and recesses fitting together to form a space between said units used for cooling purposes.
Claim 11
Dependent Claim
17 words
The combination of claim 5 wherein said first mating means is electrically connected to said first circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-04-08 | 1994-10-08 | 1995-04-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-04-08 | 1998-10-08 | 1999-04-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-04-08 | 2002-10-08 | 2003-04-09 | $7700.00 | Window Closed / Lapsed |