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US5006912A Expired / Lapsed US ⏱️ 0.0 years remaining

Heterojunction bipolar transistor with SiGe

Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1988-04-14
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Granted: 1991-04-09
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Expires: 2008-04-14
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Abstract

Abstract A heterojunction bipolar transistor has an emitter which comprises an expitaxial layer of silicon grown on a silicon and germanium base layer. The active region of the transistor comprises a semiconductor having a silicon/silicon and germanium strained lattice and the silicon and germanium base layer is grown on a silicon substrate while maintaining commensurate growth. The lattice strain is such as to produce a predetermined valence band offset at the emitter/base junction. The mobility in the base is also enhanced over that of an unstrained alloy of the same composition.

Inventors

  • 👤 Colin Smith
  • 👤 Anthony D. Welbourn

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 20:38
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/80; H10D10/821; H10D10/891; H10D62/00; H10D62/80; H10D62/82; H10D62/822

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 93 words
A heterojunction bipolar transistor having a doped silicon collector layer of a first conductivity type on a silicon substrate and an emitter of said first conductivity type which comprises an epitaxial layer of silicon grown on a silicon and germanium base layer of a second conductivity type which is grown on said silicon collector, wherein the active region of the transistor comprises a silicon/silicon and germanium strained lattice layer disposed between said emitter and collector layers, the lattice strain being such as to produce a predetermined valence band offset at the emitter/base junction.
Claim 2
Dependent Claim 93 words
A heterojunction bipolar transistor having a doped silicon collector layer of a first conductivity type on a silicon substrate and an emitter of said first conductivity type which comprises an epitaxial layer of silicon grown on a silicon and germanium base layer of a second conductivity type which is grown on said silicon collector, wherein the active region of the transistor comprises a silicon/silicon and germanium strained lattice layer disposed between said emitter and collector layers, the lattice strain being such as to produce a predetermined valence band offset at the emitter/base junction.
Claim 3
Dependent Claim 21 words
A bipolar transistor as in claim 1, wherein the silicon and germanium base layer is grown epitaxially and commensurately on silicon.
Claim 4
Dependent Claim 31 words
A bipolar transistor as in claim 1 or 2, wherein the lattice strain enhances the effective mobility of electrons in the base above that of unstrained material of the same composition.
Claim 5
Dependent Claim 29 words
A bipolar transistor as in claim 1 or 2, wherein the base comprises an alloy of silicon and germanium, the alloy being grown on a {100} plane of silicon.
Claim 6
Dependent Claim 34 words
A bipolar transistor as in claim 4, wherein the lattice strain is tailored throughout the base depth such that the energy separation between two-fold and four-fold degenerate conduction bands is increased towards the collector.
Claim 7
Dependent Claim 29 words
A bipolar transistor as in claim 1 or 2, wherein the germanium content of the silicon and germanium base layer lies within the range of from 12% to 20%.
Claim 8
Dependent Claim 19 words
A bipolar transistor as in claim 6, wherein the germanium content of the base layer is at least 15%.
Claim 9
Dependent Claim 17 words
A bipolar transistor as in claim 1 or 2, wherein the transistor is fabricated by selective epitaxy.
Claim 10
Dependent Claim 119 words
A heterojunction bipolar transistor comprising: a substrate having an emitter, base and collector formed on the substrate, the emitter and collector being of a first conductivity type and the base being of a second, opposite conductivity type, the base being formed on the collector and comprising a silicon and germanium layer, the emitter comprising an epitaxial layer of silicon grown on the base, the active region of the transistor comprising a silicon/silicon and germanium strained lattice, the lattice strain being such as to produce a predetermined valence band offset at the junction between the emitter and the base, and wherein the base comprises an alloy of silicon and germanium, the alloy being grown on a {100} plane of silicon.
Claim 11
Dependent Claim 119 words
A heterojunction bipolar transistor comprising: a substrate having an emitter, base and collector formed on the substrate, the emitter and collector being of a first conductivity type and the base being of a second, opposite conductivity type, the base being formed on the collector and comprising a silicon and germanium layer, the emitter comprising an epitaxial layer of silicon grown on the base, the active region of the transistor comprising a silicon/silicon and germanium strained lattice, the lattice strain being such as to produce a predetermined valence band offset at the junction between the emitter and the base, and wherein the base comprises an alloy of silicon and germanium, the alloy being grown on a {100} plane of silicon.
Claim 12
Dependent Claim 95 words
A heterojunction bipolar transistor comprising: a silicon substrate; a collector layer of silicon formed on said substrate; a base layer grown on said collector over and commensurately with a {100} plane of silicon, the base layer comprising an alloy of silicon and germanium; an emitter comprising an epitaxial layer of silicon grown on said base layer; wherein the active region of the transistor comprises a semiconductor having a silicon/silicon and germanium strained lattice, the lattice strain being such as to produce a predetermined valence band offset at the junction between the emitter and the base.
Claim 13
Dependent Claim 95 words
A heterojunction bipolar transistor comprising: a silicon substrate; a collector layer of silicon formed on said substrate; a base layer grown on said collector over and commensurately with a {100} plane of silicon, the base layer comprising an alloy of silicon and germanium; an emitter comprising an epitaxial layer of silicon grown on said base layer; wherein the active region of the transistor comprises a semiconductor having a silicon/silicon and germanium strained lattice, the lattice strain being such as to produce a predetermined valence band offset at the junction between the emitter and the base.
Claim 14
Dependent Claim 81 words
A heterojunction bipolar transistor comprising: a silicon substrate having a {100} plane as a growth surface, an n-type silicon collector layer formed at the top of said substrate, a p-type silicon-germanium base layer grown expitaxially on said collector and commensurately with said {100} plane, an n-type emitter layer comprising an epitaxial layer of silicon grown on said base layer, the silicon-germanium base layer being strained and providing a predetermined valence band offset at the junction between the emitter and the base.
Claim 15
Dependent Claim 81 words
A heterojunction bipolar transistor comprising: a silicon substrate having a {100} plane as a growth surface, an n-type silicon collector layer formed at the top of said substrate, a p-type silicon-germanium base layer grown expitaxially on said collector and commensurately with said {100} plane, an n-type emitter layer comprising an epitaxial layer of silicon grown on said base layer, the silicon-germanium base layer being strained and providing a predetermined valence band offset at the junction between the emitter and the base.
Claim 16
Dependent Claim 24 words
A bipolar transistor as in claim 9, 10 or 11, wherein the silicon and germanium base layer is grown epitaxially and commensurately on silicon.
Claim 17
Dependent Claim 36 words
A bipolar transistor as in claim 9, 10 or 11, wherein the lattice strain is such as to enhance the effective mobility of electrons in the base, above that of unstrained material of the same composition.
Claim 18
Dependent Claim 37 words
A bipolar transistor as in claim 9, 10 or 11, wherein the lattice strain is tailored throughout the base depth such that the energy separation between two-fold and four-fold degenerate conduction bands is increased towards the collector.
Claim 19
Dependent Claim 29 words
A bipolar transistor as in claim 9, 10 or 11, wherein the germanium content of the silicon and germanium base layer lies within the range from 12% to 20%.
Claim 20
Dependent Claim 19 words
A bipolar transistor as in claim 15, wherein the germanium content of the base layer is at least 15%.
Claim 21
Dependent Claim 18 words
A bipolar transistor as in claim 9, 10 or 11, wherein the transisitor is fabricated by selective epitaxy.

References Cited (Backward Citations)

US3275906A Cited
DE2719464A1 Cited
US4529455A Cited
JPS63118485A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-04-08 1994-10-08 1995-04-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-04-08 1998-10-08 1999-04-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-04-08 2002-10-08 2003-04-09 $7700.00 Window Closed / Lapsed

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