Thin-film transistor operable at high voltage and a method for manufacturing the same
Abstract
Abstract There are disclosed a structure and a manufacturing method of a MOS-type thin-film field effect transistor composed of a substrate having an insulating main surface, a gate electrode formed on the insulating main surface to have an upper surface and a side surface at its edge, an insulating film covering at least the upper and side surfaces of the gate electrode, a semiconductor film having three continuous first, second and third portions, the first portion positioned above the upper surface of the gate electrode, the second portion being formed in contact with the insulator film at the side surface of the gate electrode and the third portion positioned above the substrate without interposing the gate electrode, a side-wall insulator formed on a part of the third portion of the semiconductor film and having a side surface contacting the second portion of the semiconductor film, and source and drain regions formed by introducing impurity atoms into the first portion and another part of the third portion of the semiconductor film, the part and the other part of the third portion being in contact with each other. The introduction of the impurity atoms is performed with use of the side-wall insulator as a mask by ion-implantation process or a process for converting insulator solution containing impurity atoms into a solid-state insulator by a heat-treatment.
Inventors
- 👤 Hiroyasu Ishihara
Bibliographic Details
Claims Analysis
Total Claims: 5References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-03-18 | 1994-09-17 | 1995-03-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-03-18 | 1998-09-17 | 1999-03-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-03-18 | 2002-09-17 | 2003-03-19 | $7700.00 | Window Closed / Lapsed |