US4997794A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making semiconductor device comprising a capacitor and a buried passivation layer
Assignee: US Philips Corp
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Filing: 1989-11-13
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Granted: 1991-03-05
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Expires: 2009-11-13
Abstract
Abstract A semiconductor device comprising a buried phosphor glass layer (5) consisting of a subjacent thick electrically insulating layer (4), a phosphor glass layer (6) and an overlying thin covering layer (7). According to the invention, the thicker electrically insulating layer (4) is locally removed and the combination of phosphor glass layer 6 and covering layer 7 is used as a dielectric for a capacitor. The invention also relates to a method of manufacturing a capacitor with indicated dielectric.
Inventors
- 👤 Wilhelmus J. M. J. Josquin
- 👤 Henderikus Lindeman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:37
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/696; H10D1/682; H10D1/684; H10P; H10P14/00; H10P14/20; H10P14/24; H10P95/00; H10P95/90; Y; Y10; Y10S; Y10S148/00; Y10S148/014; Y10S438/00; Y10S438/958
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
190 words
A method of manufacturing a semiconductor device comprising the steps of (a) selectively oxidizing a part of a surface of a semiconductor body to form at least one oxidized surface portion, (b) forming a silicon layer on said oxidized surface portion, (c) forming a first silicon oxide layer having a given thickness both over said silicon layer and over a remaining part of said surface of said semiconductor body, (d) etching a portion of said first silicon oxide layer overlying a part of said silicon layer to form at least one opening to said silicon layer, (e) depositing phosphorous over the entire surface to form a phosphor glass layer having a high phosphor content, said phosphor glass layer contacting said silicon layer in said at least one opening, (f) coating said phosphor glass layer with a second silicon oxide layer, said second silicon oxide layer having a considerably smaller thickness than said given thickness, (g) annealing said semiconductor body to remove undesired impurities, and (h) forming a metal layer above said phosphor glass layer and said silicon layer in said at least one opening to provide at least one capacitor.
Claim 2
Independent Claim
190 words
A method of manufacturing a semiconductor device comprising the steps of (a) selectively oxidizing a part of a surface of a semiconductor body to form at least one oxidized surface portion, (b) forming a silicon layer on said oxidized surface portion, (c) forming a first silicon oxide layer having a given thickness both over said silicon layer and over a remaining part of said surface of said semiconductor body, (d) etching a portion of said first silicon oxide layer overlying a part of said silicon layer to form at least one opening to said silicon layer, (e) depositing phosphorous over the entire surface to form a phosphor glass layer having a high phosphor content, said phosphor glass layer contacting said silicon layer in said at least one opening, (f) coating said phosphor glass layer with a second silicon oxide layer, said second silicon oxide layer having a considerably smaller thickness than said given thickness, (g) annealing said semiconductor body to remove undesired impurities, and (h) forming a metal layer above said phosphor glass layer and said silicon layer in said at least one opening to provide at least one capacitor.
Claim 3
Dependent Claim
24 words
A method according to claim 1, wherein said first silicon oxide layer is formed by low pressure chemical vapor deposition (LPCVD) of tetraethoxy silane.
Claim 4
Dependent Claim
23 words
A method according to claim 2, wherein said first silicon oxide layer is densified by heating at about 950° C. for 10 minutes.
Claim 5
Dependent Claim
22 words
A method according to claim 1, wherein said step (e) is carried out by decomposing phosphine at 850° C. for 10 minutes.
Claim 6
Dependent Claim
24 words
A method according to claim 4, wherein said step (g) is carried out by heating at a temperature of 950° C. for 60 minutes.
Claim 7
Dependent Claim
41 words
A method according to claim 5, wherein at least one diode structure is formed in said surface of said semiconductor surface before said step (a), said diode structure being formed in said remaining part of said surface of said semiconductor body.
Claim 8
Dependent Claim
22 words
A method according to claim 1, wherein said step (e) is carried out by decomposing phosphine at 850° C. for 10 minutes.
Claim 9
Dependent Claim
24 words
A method according to claim 1, wherein said step (g) is carried out by heating at a temperature of 950° C. for 60 minutes.
Claim 10
Dependent Claim
41 words
A method according to claim 1, wherein at least one diode structure is formed in said surface of said semiconductor surface before said step (a), said diode structure being formed in said remaining part of said surface of said semiconductor body.
Claim 11
Dependent Claim
27 words
A method according to claim 1, wherein said given thickness ranges from 250 to 750 nm, and said considerably smaller thickness ranges from 25 to 100 nm.
Claim 12
Dependent Claim
23 words
A method according to claim 10, wherein said given thickness is approximately 400 nm, and said considerably smaller thickness is approximately 75 nm.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-03-04 | 1994-09-03 | 1995-03-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-03-04 | 1998-09-03 | 1999-03-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-03-04 | 2002-09-03 | 2003-03-05 | $7700.00 | Window Closed / Lapsed |