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US4994897A Expired / Lapsed US ⏱️ 0.0 years remaining

Multi-level semiconductor package

Assignee: Motorola Solutions Inc
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Filing: 1989-10-26
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Granted: 1991-02-19
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Expires: 2009-10-26
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Abstract

Abstract A single-in-line semiconductor package uses a multi-level heatsink having patterned conductors surrounding the semiconductor device. The patterned conductors are electrically isolated from the heatsink. Short bond wires are used to connect the semiconductor device to the patterned conductors. This arrangement eliminates the need for bonding shelves when bonding the leads and also increases the resistance of the bond wires from being swept away during encapsulation.

Inventors

  • 👤 Theodore R. Golubic
  • 👤 Frank E. Polka
  • 👤 Brian A. Webb

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 21:21
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/70; H10W40/77; H10W40/778; H10W72/00; H10W72/50; H10W72/541; H10W72/5445; H10W72/90; H10W72/931; H10W72/932; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 86 words
A multi-level single-in-line semiconductor package, comprising: a heatsink having a pedestal on top of the heatsink for receiving a semiconductor device; and insulator on the pedestal and having patterned conductors on a top surface of the insulator; wires for making electrical connections between the patterned conductors and the semiconductor device; a plurality of leads connected and the patterned conductors; and encapsulating material surrounding the pedestal, semiconductor device, insulator, wires, and a portion of the leads, and wherein the pedestal has protrusions for gripping the encapsulating material.
Claim 2
Dependent Claim 86 words
A multi-level single-in-line semiconductor package, comprising: a heatsink having a pedestal on top of the heatsink for receiving a semiconductor device; and insulator on the pedestal and having patterned conductors on a top surface of the insulator; wires for making electrical connections between the patterned conductors and the semiconductor device; a plurality of leads connected and the patterned conductors; and encapsulating material surrounding the pedestal, semiconductor device, insulator, wires, and a portion of the leads, and wherein the pedestal has protrusions for gripping the encapsulating material.
Claim 3
Dependent Claim 45 words
The semiconductor package of claim 1 wherein the remaining portion of the plurality of leads not surrounded by the encapsulating material all extend from one side of the semiconductor package, and wherein the heatsink and pedestal are a unitary piece forming a flat lower surface.
Claim 4
Dependent Claim 93 words
A semiconductor package, comprising: a multi-level heatsink having a heat spreading portion and a raised pedestal on top of the heatsink thereby forming the multi-level heatsink; a semiconductor device mounted on the pedestal; patterned conductors surrounding the semiconductor device and isolated from the pedestal; connecting means between the patterned conductors and the semiconductor device; a plurality of leads connected to the patterned conductors and extending away from the pedestal; and an encapsulate encapsulating the pedestal, semiconductor device and a portion of the leads, wherein the pedestal has protrusions for gripping the encapsulating material.
Claim 5
Dependent Claim 93 words
A semiconductor package, comprising: a multi-level heatsink having a heat spreading portion and a raised pedestal on top of the heatsink thereby forming the multi-level heatsink; a semiconductor device mounted on the pedestal; patterned conductors surrounding the semiconductor device and isolated from the pedestal; connecting means between the patterned conductors and the semiconductor device; a plurality of leads connected to the patterned conductors and extending away from the pedestal; and an encapsulate encapsulating the pedestal, semiconductor device and a portion of the leads, wherein the pedestal has protrusions for gripping the encapsulating material.
Claim 6
Dependent Claim 17 words
The semiconductor package of claim 3 wherein the pedestal has a depression for accommodating the semiconductor device.
Claim 7
Dependent Claim 19 words
The semiconductor package of claim 3 wherein at least one of the leads is electrically connected to the pedestal.
Claim 8
Dependent Claim 91 words
A semiconductor package having a leadframe, wherein the leadframe has a heatsink having a first and a second level and a plurality of leads adjacent to the second level and wherein the second level is positioned on top of the first level; a semiconductor device located on the second level; and patterned conductors surrounding the semiconductor device and being isolated from the second level, wherein the patterned conductors are electrically connected to the semiconductor device and the leads, and further wherein the second level has protrusions for gripping an encapsulating material.
Claim 9
Dependent Claim 91 words
A semiconductor package having a leadframe, wherein the leadframe has a heatsink having a first and a second level and a plurality of leads adjacent to the second level and wherein the second level is positioned on top of the first level; a semiconductor device located on the second level; and patterned conductors surrounding the semiconductor device and being isolated from the second level, wherein the patterned conductors are electrically connected to the semiconductor device and the leads, and further wherein the second level has protrusions for gripping an encapsulating material.
Claim 10
Dependent Claim 19 words
The semiconductor package of claim 6 wherein the isolated patterned conductors comprise an insulating layer having metallic leads thereon.
Claim 11
Dependent Claim 33 words
The semiconductor package of claim 7 wherein the second level forms a pedestal which is electrically and thermally common with the first level and wherein the insulating layer also has metallic leads therein.
Claim 12
Dependent Claim 26 words
The semiconductor package of claim 6 wherein the plurality of leads adjacent to the second level all extend from the semiconductor package in the same direction.

References Cited (Backward Citations)

US4032706A Cited
US4132856A Cited
US4807018A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-02-18 1994-08-20 1995-02-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-02-18 1998-08-20 1999-02-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-02-18 2002-08-20 2003-02-19 $7700.00 Window Closed / Lapsed

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