Photoelectric conversion semiconductor device with noise limiting circuit

Claim 2

A photoelectric conversion semiconductor device comprising: an insulating and transparent substrate; a plurality of photoelectric conversion elements formed in a line on the insulating and transparent substrate; selection switching elements comprising a plurality of first thin film transistors formed on the insulating and transparent substrate, for selection photoelectric conversion elements; a driving circuit comprising a plurality of second thin film transistors formed on the insulating and transparent substrate, for driving the photoelectric conversion elements through the selection switching elements; the driving circuit including a plurality of one-bit shift registers each having one switch and two series-connected complementary metal oxide semiconductor (CMOS) inverters, and input signal of each one-bit shift register being supplied to one of the CMOS inverters, an output signal of the other of the CMOS inverters being supplied to a next stage of the one-bit shift register, one of the output signals of the two CMOS inverters being supplied to one of the selection switching elements; and noise limiting means, coupled to the photoelectric conversion elements, for limiting levels of signals read therefrom at a predetermined level to eliminate noise on the read-out signals.

Claim 3

A photoelectric conversion semiconductor device as claimed in claim 1, wherein the noise limiting means comprises a diode clamper.

Claim 4

A photoelectric conversion semiconductor device as claimed in claim 2, wherein the diode clamper of the noise limiting means is made by a thin film transistor formed on the insulating and transparent substrate, and a gate and source of the thin film transistor of the diode clamper are mutually connected to each other.

Claim 5

A photoelectric conversion semiconductor device as claimed in claim 2, wherein said diode clamper comprises a diode which is biased at a predetermined voltage.

Claim 6

A photoelectric conversion semiconductor device comprising: an insulating and transparent substrate; a plurality of photoelectric conversion elements formed in a line on the insulating and transparent substrate; selection switching elements comprising a plurality of first thin film transistors formed on the insulating and transparent substrate, for selecting photoelectric conversion elements; and a driving circuit comprising a plurality of second thin film transistors formed on the insulating and transparent substrate, for driving the photoelectric conversion elements through the selection switching elements; the driving circuit including a plurality of one-bit shift registers each having first and second switches and first, second and third series-connected complementary metal oxide semiconductor (CMOS) inverters, wherein an input signal of each one-bit shift register is supplied to the first inverters, an output of the first inverter is supplied to an input of the second inverter through the first switch, and an output of the second inverter is supplied to an input of the third inverter, an output signal of the third inverter is fed back to the input of the second inverter through the second switch and is supplied to a next stage of the one-bit shift register, the output of the second inverter is supplied to one of the selection switching elements coupled with the photoelectric conversion elements, and wherein the photoelectric conversion semiconductor device further comprises noise limiting means, coupled to the photoelectric conversion elements, for limiting levels of signals read therefrom at a predetermined level to eliminate noise on the read-out signals.

Claim 7

A photoelectric conversion semiconductor device comprising: an insulating and transparent substrate; a plurality of photoelectric conversion elements formed in a line on the insulating and transparent substrate; selection switching elements comprising a plurality of first thin film transistors formed on the insulating and transparent substrate, for selecting photoelectric conversion elements; and a driving circuit comprising a plurality of second thin film transistors formed on the insulating and transparent substrate, for driving the photoelectric conversion elements through the selection switching elements; the driving circuit including a plurality of one-bit shift registers each having first and second switches and first, second and third series-connected complementary metal oxide semiconductor (CMOS) inverters, wherein an input signal of each one-bit shift register is supplied to the first inverters, an output of the first inverter is supplied to an input of the second inverter through the first switch, and an output of the second inverter is supplied to an input of the third inverter, an output signal of the third inverter is fed back to the input of the second inverter through the second switch and is supplied to a next stage of the one-bit shift register, the output of the second inverter is supplied to one of the selection switching elements coupled with the photoelectric conversion elements, and wherein the photoelectric conversion semiconductor device further comprises noise limiting means, coupled to the photoelectric conversion elements, for limiting levels of signals read therefrom at a predetermined level to eliminate noise on the read-out signals.

Claim 8

A photoelectric conversion semiconductor device as claimed in claim 5, wherein the noise limiting comprises a diode clamper.

Claim 9

A photoelectric conversion semiconductor device as claimed in claim 6, wherein the diode clamper of the noise limiting means is made by a thin film transistor formed on the insulating and transparent substrate, and a gate and source of the thin film transistor of the diode clamper are mutually connected to each other.

Claim 10

A photoelectric conversion semiconductor device as claimed in claim 6, wherein said diode clamper comprises a diode which is biased at a predetermined voltage.