US4994804A
Expired / Lapsed
US
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Double integration delta-sigma modulation analog to digital converter
Assignee: Toshiba Corp
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Filing: 1989-03-14
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Granted: 1991-02-19
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Expires: 2009-03-14
Abstract
Abstract A delta-sigma modulation analog to digital converter for converting an analog input signal to a digital output signal. The converter includes an input circuit for receiving the analog input signal, a clock generator for generating a very high frequency clock signal with first and second phases, a first switching circuit coupled to the input circuit for modulating the analog input signal with the very high frequency clock signal, an integration circuit coupled to the first switching circuit for integrating the modulated input signal and generating a noise signal, a second switching circuit coupled to the integration circuit both for demodulating the integrated modulated input signal and modulating the noise signal with the very high frequency clock signal, a quantizing circuit coupled to the second switching circuit for responsive to the demodulated input signal and the modulated noise signal for generating the digital output signal including a separable portion corresponding to the modulated noise signal and a feedback circuit coupled between the quantizing circuit and the integration circuit both for generating a feedback signal corresponding to the digital output signal and feeding the feedback signal to the integration circuit.
Inventors
- 👤 Takashi Sakaguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 08:43
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/02; H03M3/30; H03M3/322; H03M3/324; H03M3/326; H03M3/338; H03M3/34; H03M3/39; H03M3/412; H03M3/422; H03M3/43; H03M3/436; H03M3/438; H03M3/454
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
220 words
A delta-sigma modulation analog to digital converter for converting an analog input signal to a digital output signal, comprising: input means for receiving the analog input signal; clock generator means for generating a very high frequency clock signal with first and second phases; first switching circuit means, coupled to the input means, for modulating the analog input signal with the very high frequency clock signal; integration means, coupled to the first switching circuit means, for integrating the modulated input signal, the integration means also generating a noise signal; second switching circuit means, coupled to the integration means, both for demodulating the integrated modulated input signal and modulating the noise signal with the very high frequency clock signal; second integration means, coupled to the second switching circuit means, for integrating the demodulated integrated modulated input signal and the modulated noise signal; quantizer means, coupled to the second integration means and responsive to the second integrated demodulated integrated modulated input signal and the integrated modulated nose signal, for generating the digital output signal, the digital output signal including a separable portion corresponding to the integrated modulated noise signal; and feedback circuit means, coupled between the quantizer means and the integration means, for both generating a feedback signal corresponding to the digital output signal and feeding the feedback signal to the integration means.
Claim 2
Dependent Claim
220 words
A delta-sigma modulation analog to digital converter for converting an analog input signal to a digital output signal, comprising: input means for receiving the analog input signal; clock generator means for generating a very high frequency clock signal with first and second phases; first switching circuit means, coupled to the input means, for modulating the analog input signal with the very high frequency clock signal; integration means, coupled to the first switching circuit means, for integrating the modulated input signal, the integration means also generating a noise signal; second switching circuit means, coupled to the integration means, both for demodulating the integrated modulated input signal and modulating the noise signal with the very high frequency clock signal; second integration means, coupled to the second switching circuit means, for integrating the demodulated integrated modulated input signal and the modulated noise signal; quantizer means, coupled to the second integration means and responsive to the second integrated demodulated integrated modulated input signal and the integrated modulated nose signal, for generating the digital output signal, the digital output signal including a separable portion corresponding to the integrated modulated noise signal; and feedback circuit means, coupled between the quantizer means and the integration means, for both generating a feedback signal corresponding to the digital output signal and feeding the feedback signal to the integration means.
Claim 3
Dependent Claim
35 words
The converter of claim 1 wherein the input means includes inversed and non-inversed phase input terminals and each of the integration means and the quantizer means has inversed and non-inversed phase input and output terminals.
Claim 4
Dependent Claim
48 words
The converter of claim 2 wherein the first and second switching circuit means each includes four switches, a first pair of the switches corresponding to the first phase of the clock signal and a second pair of the switches corresponding to the second phase of the clock signal.
Claim 5
Dependent Claim
56 words
The converter of claim 3 wherein the first pair of the switches is coupled between inversed phase input terminals, the other switch of the first pair of the switches is coupled between non-inversed phase input terminals, and the second pair of switches is coupled between one inversed phase input terminal and one non-inversed phase input terminal.
Claim 6
Dependent Claim
28 words
The converter of claim 2 wherein the feedback circuit means includes subtraction means for subtracting one from the other between the analog input signals and the feedback signals.
Claim 7
Dependent Claim
21 words
The converter of claim 5 wherein the subtraction means is coupled between the input means and the first switching circuit means.
Claim 8
Dependent Claim
21 words
The converter of claim 5 wherein the subtraction means is coupled between the first switching circuit means and the integration means.
Claim 9
Dependent Claim
31 words
The converter of claim 7 wherein the feedback circuit means includes third switching circuit means for matching the phase of the feedback signal to the phase of the analog input signal.
Claim 10
Dependent Claim
37 words
The converter of claim 1 wherein the feedback circuit means further includes a second subtraction means for subtracting one from the other between the integrated input signal output from the first integration means and the feedback signals.
Claim 11
Dependent Claim
22 words
The converter of claim 9 wherein the first subtraction means is coupled between the input means and the first switching circuit means.
Claim 12
Dependent Claim
23 words
The converter of claim 10 wherein the second subtraction means is coupled between the second switching circuit means and the second integration means.
Claim 13
Dependent Claim
23 words
The converter of claim 10 wherein the second subtraction means is coupled between he first integration means and the second switching circuit means.
Claim 14
Dependent Claim
37 words
The converter of claim 12 wherein the feedback circuit means includes third switching circuit means for matching the phase of the feedback signal to the phase of the integrated input signal output from the first integration means.
Claim 15
Dependent Claim
23 words
The converter of claim 9 wherein the first subtraction means is coupled between the first switching circuit means and the first integration means.
Claim 16
Dependent Claim
23 words
The converter of claim 14 wherein the second subtraction means is coupled between the second switching circuit means and the second integration means.
Claim 17
Dependent Claim
31 words
The converter of claim 15 wherein the feedback circuit means includes third switching circuit means for matching the phase of the feedback signal to the phase of the analog input signal.
Claim 18
Dependent Claim
23 words
The converter of claim 14 wherein the second subtraction means is coupled between the first integration means and the second switching circuit means.
Claim 19
Dependent Claim
42 words
The converter of claim 17 wherein the feedback circuit means includes third switching circuit means for matching the phase of the feedback signal to the phases of the analog input signal and the integrated input signal output from the first integration means.
Claim 20
Dependent Claim
311 words
A delta-sigma modulation analog to digital converter for converting an analog input signal to a digital output signal, comprising: input means for receiving the analog input signal; clock generator means for generating a very high frequency clock signal with first and second phases; first switching circuit means, coupled to the input means, for modulating the analog input signal with the very high frequency clock signal; integration means, coupled to the first switching circuit means, for integrating the modulated input signal, the integration means also generating a noise signal; second switching circuit means, coupled to the integration means, both for demodulating the integrated modulated input signal and modulating the noise signal with a very high frequency clock signal; second integration means, coupled to the second switching circuit means, for integrating the demodulated integrated modulated input signal and the modulated nose signal; quantizer means, coupled to the second integration means and responsive to the second integrated demodulated integrated modulated input signal and the integrated modulated noise signal, for generating the digital output signal, the digital output signal including a separable portion corresponding to the integrated modulated noise signal, each of the integration means and the quantizer means having inversed and non-inversed phase input and output terminals and the input means includes inversed and non-inversed phase input signals; and feedback circuit means, coupled between the quantizer means and the integration means, for both generating a feedback signal corresponding to the digital output signal and feeding the feedback signal to the integration means, wherein the feedback circuit means includes a first subtraction means, coupled between the input means and the first switching circuit means, for subtracting one from the other between the analog input signals and the feedback signals, and a second subtraction means for subtracting one from the other between the integrated input signal output from the first integration means and the feedback signals.
Claim 21
Dependent Claim
311 words
A delta-sigma modulation analog to digital converter for converting an analog input signal to a digital output signal, comprising: input means for receiving the analog input signal; clock generator means for generating a very high frequency clock signal with first and second phases; first switching circuit means, coupled to the input means, for modulating the analog input signal with the very high frequency clock signal; integration means, coupled to the first switching circuit means, for integrating the modulated input signal, the integration means also generating a noise signal; second switching circuit means, coupled to the integration means, both for demodulating the integrated modulated input signal and modulating the noise signal with a very high frequency clock signal; second integration means, coupled to the second switching circuit means, for integrating the demodulated integrated modulated input signal and the modulated nose signal; quantizer means, coupled to the second integration means and responsive to the second integrated demodulated integrated modulated input signal and the integrated modulated noise signal, for generating the digital output signal, the digital output signal including a separable portion corresponding to the integrated modulated noise signal, each of the integration means and the quantizer means having inversed and non-inversed phase input and output terminals and the input means includes inversed and non-inversed phase input signals; and feedback circuit means, coupled between the quantizer means and the integration means, for both generating a feedback signal corresponding to the digital output signal and feeding the feedback signal to the integration means, wherein the feedback circuit means includes a first subtraction means, coupled between the input means and the first switching circuit means, for subtracting one from the other between the analog input signals and the feedback signals, and a second subtraction means for subtracting one from the other between the integrated input signal output from the first integration means and the feedback signals.
Claim 22
Dependent Claim
23 words
The converter of claim 19 wherein the second subtraction means is coupled between the second switching circuit means and the second integration means.
Claim 23
Dependent Claim
23 words
The converter of claim 19 wherein the second subtraction means is coupled between the first integration means and the second switching circuit means.
Claim 24
Dependent Claim
37 words
The converter of claim 21 wherein the feedback circuit means includes third switching circuit means for matching the phase of the feedback signal to the phase of the integrated input signal output from the first integration means.
Claim 25
Dependent Claim
312 words
A delta-sigma modulation analog to digital converter for converting an analog input signal to a digital output signal, comprising: input means for receiving the analog input signal; clock generator means for generating a very high frequency clock signal with first and second phases; first switching circuit means, coupled to the input means, for modulating the analog input signal with the very high frequency clock signal; integration means, coupled to the first switching circuit means, for integrating the modulated input signal, the integration means also generating a noise signal; second switching circuit means, coupled to the integration means, both for demodulating the integrated modulated input signal and modulating the nose signal with a very high frequency clock signal; second integration means, coupled to the second switching circuit means, for integrating the demodulated integrated modulated input signal and the modulated noise signal; quantizer means, coupled to the second integration means and responsive to the second integrated demodulated integrated modulated input signal and the integrated modulated noise signal, for generating the digital output signal, the digital output signal including a separable portion corresponding to the integrated modulated noise signal, each of the integration means and the quantizer means having inversed and non-inversed phase input and output terminals and the input means includes inversed and non-inversed phase input signals; and feedback circuit means, coupled between the quantizer means and the integration means, for both generating a feedback signal corresponding to the digital output signal and feeding the feedback signal to the integration means, wherein the feedback circuit means includes a first subtraction means, coupled between the first switching circuit means and the first integration means, for subtracting one from the other between the analog input signals and thee feedback signals, and a second subtraction means for subtracting one from the other between the integrated input signal output from the first integration means and the feedback signals.
Claim 26
Dependent Claim
312 words
A delta-sigma modulation analog to digital converter for converting an analog input signal to a digital output signal, comprising: input means for receiving the analog input signal; clock generator means for generating a very high frequency clock signal with first and second phases; first switching circuit means, coupled to the input means, for modulating the analog input signal with the very high frequency clock signal; integration means, coupled to the first switching circuit means, for integrating the modulated input signal, the integration means also generating a noise signal; second switching circuit means, coupled to the integration means, both for demodulating the integrated modulated input signal and modulating the nose signal with a very high frequency clock signal; second integration means, coupled to the second switching circuit means, for integrating the demodulated integrated modulated input signal and the modulated noise signal; quantizer means, coupled to the second integration means and responsive to the second integrated demodulated integrated modulated input signal and the integrated modulated noise signal, for generating the digital output signal, the digital output signal including a separable portion corresponding to the integrated modulated noise signal, each of the integration means and the quantizer means having inversed and non-inversed phase input and output terminals and the input means includes inversed and non-inversed phase input signals; and feedback circuit means, coupled between the quantizer means and the integration means, for both generating a feedback signal corresponding to the digital output signal and feeding the feedback signal to the integration means, wherein the feedback circuit means includes a first subtraction means, coupled between the first switching circuit means and the first integration means, for subtracting one from the other between the analog input signals and thee feedback signals, and a second subtraction means for subtracting one from the other between the integrated input signal output from the first integration means and the feedback signals.
Claim 27
Dependent Claim
42 words
The converter of claim 23 wherein the feedback circuit means includes third switching circuit means for matching the phase of the feedback signal to the phases of the analog input signal and the integrated input signal output from the first integration means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-02-18 | 1994-08-20 | 1995-02-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-02-18 | 1998-08-20 | 1999-02-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-02-18 | 2002-08-20 | 2003-02-19 | $7700.00 | Window Closed / Lapsed |