Patent US4987494A successfully refreshed from Google Patents.
US4987494A
Expired / Lapsed
US
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System for parallel transfer between CCD arrays
Assignee: United States Department of the Army
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Filing: 1989-12-07
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Granted: 1991-01-22
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Expires: 2009-12-07
Abstract
Abstract The invention provides a composite CCD storage chip, i.e. a chip with two D's or equivalent charge packet storage devices mounted on opposite sides of the same chip, wherein the charge packets are transferred in parallel through the small dimension of the chip using central boundary layers.
Inventors
- 👤 Charles F. Freeman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:48
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/70; H04N25/71; H04N25/745; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/15; H10F39/153
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
104 words
A composite multilayer CCD structure comprising: two monolayer CCD's formed on first and second layers with the same polarity type of doped semiconductor material each supporting an array of electrodes, at least one CID, and electronic clock means interconnecting said electrodes; a boundary layer including a third layer of doped semiconductor material of opposite polarity type joining said first and second layers such that at least some of said electrodes form normally opposing pairs through said layers; and said clock means including intermittent biasing means for applying sufficient potential between said opposing pairs of electrodes to cause charge to flow through said boundary layer.
Claim 2
Dependent Claim
104 words
A composite multilayer CCD structure comprising: two monolayer CCD's formed on first and second layers with the same polarity type of doped semiconductor material each supporting an array of electrodes, at least one CID, and electronic clock means interconnecting said electrodes; a boundary layer including a third layer of doped semiconductor material of opposite polarity type joining said first and second layers such that at least some of said electrodes form normally opposing pairs through said layers; and said clock means including intermittent biasing means for applying sufficient potential between said opposing pairs of electrodes to cause charge to flow through said boundary layer.
Claim 3
Dependent Claim
21 words
A composite structure according to claim 1; further including: a fourth layer on intrinsic semiconductor between said first and third layers.
Claim 4
Dependent Claim
21 words
A composite structure according to claim 2; further including a fifth layer of intrinsic semiconductor between said second and third layers.
Claim 5
Dependent Claim
14 words
A composite structure according to claim 1; wherein: said CID is a junction device.
Claim 6
Dependent Claim
14 words
A composite structure according to claim 1; wherein: said CID is a MOS device.
Claim 7
Dependent Claim
14 words
A composite structure according to claim 1; wherein: said CID is a MIS device.
Claim 8
Dependent Claim
13 words
A composite structure according to claim 1; wherein: said CID is a photoconductor.
Claim 9
Dependent Claim
13 words
A composite structure according to claim 1; wherein: said CID is a photodiode.
Claim 10
Dependent Claim
19 words
A composite structure according to claim 1; wherein: at least one of said monolayer CCD's is an imaging device.
Claim 11
Dependent Claim
16 words
A composite structure according to claim 1; wherein: both of said monolayer CCD's are imaging devices.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-21 | 1994-07-23 | 1995-01-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-21 | 1998-07-23 | 1999-01-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-21 | 2002-07-23 | 2003-01-22 | $7700.00 | Window Closed / Lapsed |