US4987416A
Expired / Lapsed
US
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Analog to digital converters
Assignee: Plessey Semiconductors Ltd
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Filing: 1989-08-08
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Granted: 1991-01-22
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Expires: 2009-08-08
Abstract
Abstract In order to reduce noise in single or multiloop analog to digital converter circuits employing n-bit quantisers (n>1), only the MSB of the quantiser output is fed back in a feedback loop in reduce problems of overload in a feed-forward (integrator filter). The feedback MSB may be subtracted as an offset from the input analog signal or used to control the sign of inversion of a signal inverter.
Inventors
- 👤 Thomas C. Leslie
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 10:15
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/39; H03M3/412; H03M3/422; H03M3/424; H03M3/428
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
146 words
An analog-to-digital converter circuit comprising a differencing means for comparing an analog input signal and a feedback signal to provide an output dependent on the difference between the signals, a feed-forward filter coupled to receive the differencing means output for providing low-frequency preemphasis, and coupled to the input of an n-bit quantiser (where n>1) for providing an output signal comprising an n-bit representation of the signal applied to its input, a means for truncating the quantiser output signal to the MSB and for providing a feed back signal whose value is dependent on the MSB, a feedback filter means coupled to receive the feedback signal and provide it to the differencing means, and correction means for providing a correction signal for combining with the quantiser output signal, to provide a converter circuit output signal which compensates for the effect of the truncation in the feedback loop.
Claim 2
Dependent Claim
146 words
An analog-to-digital converter circuit comprising a differencing means for comparing an analog input signal and a feedback signal to provide an output dependent on the difference between the signals, a feed-forward filter coupled to receive the differencing means output for providing low-frequency preemphasis, and coupled to the input of an n-bit quantiser (where n>1) for providing an output signal comprising an n-bit representation of the signal applied to its input, a means for truncating the quantiser output signal to the MSB and for providing a feed back signal whose value is dependent on the MSB, a feedback filter means coupled to receive the feedback signal and provide it to the differencing means, and correction means for providing a correction signal for combining with the quantiser output signal, to provide a converter circuit output signal which compensates for the effect of the truncation in the feedback loop.
Claim 3
Dependent Claim
42 words
A converter circuit according to claim 1 wherein a second differencing means and a second feed-forward filter are coupled between the first-mentioned feed-forward filter and the n-bit quantiser, and the feedback filter means is coupled to the first-mentioned and second differencing means.
Claim 4
Dependent Claim
45 words
A converter circuit according to claim 2 wherein a third differencing means and a third feed-forward filter are coupled between the second feed-forward filter and the n-bit quantiser, and the output of the feedback filter is coupled to the first-mentioned second and third differencing means.
Claim 5
Dependent Claim
47 words
A converter circuit according to claim 2 wherein the input to the n-bit quantiser is provided as an analog input signal to a second converter circuit similar to the converter circuit set forth above, and the converter circuit output signals are combined in a further combining means.
Claim 6
Dependent Claim
56 words
A converter circuit according to claim 4 wherein the input to the n-bit quantiser of the second converter circuit is provided as an input to a third converter circuit similar to the first-mentioned converter circuit set forth above, and the converter circuit output signals of all three converter circuits are combined in a further combining means.
Claim 7
Dependent Claim
18 words
A converter circuit according to claim 1 wherein the MSB of the quantiser output constitutes the feedback signal.
Claim 8
Dependent Claim
120 words
An analog-to-digital converter circuit comprising means for selectively inverting an input signal and feeding the signal via a feedforward filter providing low frequency pre-emphasis to an n-bit quantiser (where n>1) for providing an output signal comprising an n-bit representation of the signal applied to its input, a means for truncating the quantiser output signal to the MSB and providing a feedback signal whose value is dependent on the MSB, a feedback filter means coupled to receive the feedback signal and to provide it to the selective inversion means for control thereof, and correction means for correcting the quantiser output signal to provide a converter circuit output signal which compensates for the effect of the selective inversion of the input signal.
Claim 9
Dependent Claim
120 words
An analog-to-digital converter circuit comprising means for selectively inverting an input signal and feeding the signal via a feedforward filter providing low frequency pre-emphasis to an n-bit quantiser (where n>1) for providing an output signal comprising an n-bit representation of the signal applied to its input, a means for truncating the quantiser output signal to the MSB and providing a feedback signal whose value is dependent on the MSB, a feedback filter means coupled to receive the feedback signal and to provide it to the selective inversion means for control thereof, and correction means for correcting the quantiser output signal to provide a converter circuit output signal which compensates for the effect of the selective inversion of the input signal.
Claim 10
Dependent Claim
65 words
A circuit according to claim 7 including a second analog-to-digital converter circuit similar to the first-mentioned converter circuit wherein the output of the feedforward filter of the second circuit is applied as an input to the first converter circuit, and including second correction means for correcting the quantiser output signal of the first circuit to compensate for the selective inversion occuring within the second circuit.
Claim 11
Dependent Claim
65 words
A circuit according to claim 8 including a third analog-to-digital converter circuit similar to the first-mentioned converter circuit wherein the output of the feedforward filter of the third circuit is applied as an input to the second converter circuit, and including third correction means for correcting the quantiser output signal of the first circuit to compensate for the selective inversion occuring within the third circuit.
Claim 12
Dependent Claim
18 words
A circuit according to claim 8 wherein the second and/or third circuits include a single bit quantiser (n=1).
Claim 13
Dependent Claim
20 words
A circuit according to claim 7 wherein the feedback signal in the first, second and/or third circuits comprises the MSB.
Claim 14
Dependent Claim
26 words
A circuit according to claim 7 wherein the first, second and/or third correction means comprises a selective inversion means and controlled by the respective feedback signal.
References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-01-21 | 1994-07-23 | 1995-01-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-21 | 1998-07-23 | 1999-01-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-21 | 2002-07-23 | 2003-01-22 | $7700.00 | Window Closed / Lapsed |