Patent US4987384A successfully refreshed from Google Patents.
US4987384A
Expired / Lapsed
US
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High frequency amplifier
Assignee: Mitsubishi Electric Corp
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Filing: 1989-10-02
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Granted: 1991-01-22
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Expires: 2009-10-02
Abstract
Abstract A high frequency amplifier including a field effect transistor as the amplifying element, includes an output detection section stripline for detecting the level of the output signal from the field effect transistor conducting main amplification, a pair of resistors connected between the both ends of the output detection section stripline and ground, a second field effect transistor to the gate of which a resistor from one end of the output detection section stripline is connected, the source or drain of the second field effect transistor being connected to the gate bias circuit of the main amplifying FET for controlling the drain current of the main amplifying FET in response to the output signal level of the main amplifying FET.
Inventors
- 👤 Masahide Yamanouchi
- 👤 Tetsuro Mori
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:20
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/306; H03F3/00; H03F3/60; H03F3/601
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
106 words
A high frequency amplifier including: a first field effect transistor for amplifying a first input signal and producing an amplified output signal; an output detection section stripline having first and second ends for detecting the level of the amplified output signal; a series connected first resistor and diode connected between the first end of said output detection section stripline and ground; and a second field effect transistor connected to the connection of said first resistor and diode to receive as a second input signal the signal at said node and to produce, in response thereto, a second output signal for biasing said first field effect transistor.
Claim 2
Dependent Claim
106 words
A high frequency amplifier including: a first field effect transistor for amplifying a first input signal and producing an amplified output signal; an output detection section stripline having first and second ends for detecting the level of the amplified output signal; a series connected first resistor and diode connected between the first end of said output detection section stripline and ground; and a second field effect transistor connected to the connection of said first resistor and diode to receive as a second input signal the signal at said node and to produce, in response thereto, a second output signal for biasing said first field effect transistor.
Claim 3
Dependent Claim
34 words
A high frequency amplifier as defined in claim 1 including an output section stripline for transmitting the amplified output signal wherein said output detection section stripline is disposed parallel to said output section stripline.
Claim 4
Dependent Claim
44 words
A high frequency amplifier as defined in claim 1 including a first capacitor connected in series between said first resistor and ground, and a second resistor and a second capacitor connected in series between the second end of said output detection stripline and ground.
Claim 5
Dependent Claim
43 words
A high frequency amplifier as defined in claim 3 wherein said second field effect transistor includes a gate for receiving an input signal and the connection of said first resistor and diode is connected to the gate of said second field effect transistor.
Claim 6
Dependent Claim
155 words
An amplifier employing stripline circuitry comprising: a first field effect transistor including source, gate, and drain electrodes for amplifying an input signal applied to said gate electrode and for producing an amplified output signal at said drain electrode; input and output striplines connected to the gate and drain electrodes of said first field effect transistor for transmitting the input signal to and the output signal from said first field effect transistor, respectively; a gate biasing network having a gate biasing terminal for supplying a gate biasing signal to the gate electrode of said first field effect transistor; a detection stripline proximate said output stripline for producing a feedback signal indicative of the amplitude of the output signal; and feedback means for rectifying the feedback signal and supplying the rectified feedback signal to the gate biasing network to control the direct current component of the output signal in response to the amplitude of the output signal.
Claim 7
Dependent Claim
155 words
An amplifier employing stripline circuitry comprising: a first field effect transistor including source, gate, and drain electrodes for amplifying an input signal applied to said gate electrode and for producing an amplified output signal at said drain electrode; input and output striplines connected to the gate and drain electrodes of said first field effect transistor for transmitting the input signal to and the output signal from said first field effect transistor, respectively; a gate biasing network having a gate biasing terminal for supplying a gate biasing signal to the gate electrode of said first field effect transistor; a detection stripline proximate said output stripline for producing a feedback signal indicative of the amplitude of the output signal; and feedback means for rectifying the feedback signal and supplying the rectified feedback signal to the gate biasing network to control the direct current component of the output signal in response to the amplitude of the output signal.
Claim 8
Dependent Claim
82 words
The amplifier of claim 5 wherein the detection stripline includes first and second terminals and said feedback means includes a rectifier connected from the first terminal to ground for rectifying the feedback signal, a second field effect transistor having source, gate, and drain electrodes, the gate electrode of the second field effect transistor receiving the rectified feedback signal and one of the drain and source electrodes of the second field effect transistor supplying the rectified feedback signal to the gate biasing network.
Claim 9
Dependent Claim
39 words
The amplifier of claim 6 wherein the first terminal is connected to ground through the rectifier, a resistor, and a capacitor, all serially connected, and the second terminal is connected to ground through a serially connected resistor and capacitor.
Claim 10
Dependent Claim
56 words
The amplifier of claim 6 wherein the gate biasing network includes a biasing stripline and two biasing resistors serially connected from the gate electrode to the first field effect transistor to ground and the electrode of the second field effect transistor supplying the rectified feedback signal is connected to the junction of the two biasing resistors.
Claim 11
Dependent Claim
30 words
The amplifier of claim 5 wherein the detection stripline is disposed parallel to and proximate the output stripline for coupling the striplines to each other and producing the feedback signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-21 | 1994-07-23 | 1995-01-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-21 | 1998-07-23 | 1999-01-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-21 | 2002-07-23 | 2003-01-22 | $7700.00 | Window Closed / Lapsed |