US4983965A
Expired / Lapsed
US
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Demodulation apparatus
Assignee: Hitachi Ltd
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Filing: 1989-12-04
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Granted: 1991-01-08
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Expires: 2009-12-04
Abstract
Abstract An original digital signal is converted into either a Miller-squared code signal or a Miller code signal, and undergoes serial-to-parallel conversion to produce n-phase signals (where n is desired to be a positive even number). N-phase virtual demodulated signals are simultaneously generated at clock timing having a period equivalent to 1/n times the period of the transmission clock. Out of the n-phase virtual demodulated signals, n/2 phases are selected to undergo parallel-to-serial conversion, the original digital signal being thus obtained.
Inventors
- 👤 Nobukazu Doi
- 👤 Morishi Izumita
- 👤 Seiichi Mita
- 👤 Yoshizumi Eto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 06:29
CPC Classifications
H; H03; H03M; H03M5/00; H03M5/02; H03M5/04; H03M5/14
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
74 words
A demodulation apparatus comprising: serial-to-parallel conversion means for converting a Miller-squared code signal or a Miller code signal supplied as a serial signal to parallel signals; first means for deriving n-phase virtual demodulated signals from said parallel signals; phase detection means for detecting phase information from a specific pattern of said parallel signals; and selection means for selecting n/2-phase virtual demodulated signals out of n-phase virtual demodulated signals in response to said phase information.
Claim 2
Dependent Claim
74 words
A demodulation apparatus comprising: serial-to-parallel conversion means for converting a Miller-squared code signal or a Miller code signal supplied as a serial signal to parallel signals; first means for deriving n-phase virtual demodulated signals from said parallel signals; phase detection means for detecting phase information from a specific pattern of said parallel signals; and selection means for selecting n/2-phase virtual demodulated signals out of n-phase virtual demodulated signals in response to said phase information.
Claim 3
Dependent Claim
31 words
A demodulation apparatus according to claim 1, wherein when said serial signal comprises a Miller-squared code signal, said specific pattern comprises at least one of "100001", "0111110", "1000001", "01111110" and "10000001".
Claim 4
Dependent Claim
27 words
A demodulation apparatus according to claim 1, wherein when said serial signal comprises a Miller code signal, said specific pattern comprises either one of "011110" and "100001".
Claim 5
Dependent Claim
17 words
A demodulation apparatus according to claim 1, wherein said first means and selection means comprise CMOS circuits.
Claim 6
Dependent Claim
149 words
A demodulation apparatus according to claim 1, wherein n is 4, wherein said serial-to-parallel conversion means comprises: a shift register for shifting an original digital signal in synchronism with a transmission clock; a frequency division circuit for generating a clock divided in frequency with a ratio of 1/4 as compared with said transmission clock; and first latch means for latching outputs of said shift register in response to said frequency-divided clock and for outputting four-phase parallel signals g, h, i and j, and wherein said first means comprises: second latch means for outputting delayed signals k, l, m and n obtained by delaying said signals g, h, i and j by one frequency-divided clock; and logic means for performing logical operation kln+kln, lmg+lmg, mnh+mnh and ngi30 ngi upon said signals g, h, i, k, l, m and n to generate virtual demodulated signals o, p, q and r, respectively.
Claim 7
Dependent Claim
27 words
A demodulation apparatus according to claim 5, wherein said phase detection means detects occurrence of the specific pattern from outputs of said first and second latch means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-07 | 1994-07-09 | 1995-01-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-07 | 1998-07-09 | 1999-01-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-07 | 2002-07-09 | 2003-01-08 | $7700.00 | Window Closed / Lapsed |