US4982256A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Optoelectronic integrated circuit
Assignee: NEC Corp
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Filing: 1988-10-24
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Granted: 1991-01-01
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Expires: 2008-10-24
Abstract
Abstract An optoelectronic integrated circuit comprises an optical device such as a photodiode and a semiconductor laser provided on a semi-insulating InP substrate and buried except for an operating plane with a high resistance buried layer, and a field effect transistor provided on a strain buffer layer which is provided on the semi-insulating InP substrate. The top surfaces of the optical device and the high resistance buried layer are of the approximately same position levels. Therefore, an optoelectronic integrated circuit is fabricated with a high yield and a high performance.
Inventors
- 👤 Akira Suzuki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:21
CPC Classifications
H; H10; H10H; H10H29/00; H10H29/10; H01; H01S; H01S5/00; H01S5/02; H01S5/026; H01S5/0261
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
165 words
An optoelectronic integrated circuit comprising: a semi-insulating InP substrate, an optical device of an InP system semiconductor which is selected from InGaAs and InGaAsP, and provided on said semi-insulating InP substrate, said optical device having a flat plane on which electrodes are provided to be connected to lead patterns; a high resistance buried layer of InP for burying said optical device except for said flat plane, said high resistance buried layer being provided on said semi-insulating InP substrate, and a position level of said high resistance buried layer being equal on its top surface to a position level of said flat plane; a strain buffer layer of a material which is selected from GaAs and AlGaAs provided on said top surface of said high resistance buried layer; and a field effect transistor of a GaAs system semiconductor including AlGaAs, said field effect transistor being provided on said strain buffer layer and provided with electrodes thereon to be connected to selected ones of said lead patterns.
Claim 2
Dependent Claim
165 words
An optoelectronic integrated circuit comprising: a semi-insulating InP substrate, an optical device of an InP system semiconductor which is selected from InGaAs and InGaAsP, and provided on said semi-insulating InP substrate, said optical device having a flat plane on which electrodes are provided to be connected to lead patterns; a high resistance buried layer of InP for burying said optical device except for said flat plane, said high resistance buried layer being provided on said semi-insulating InP substrate, and a position level of said high resistance buried layer being equal on its top surface to a position level of said flat plane; a strain buffer layer of a material which is selected from GaAs and AlGaAs provided on said top surface of said high resistance buried layer; and a field effect transistor of a GaAs system semiconductor including AlGaAs, said field effect transistor being provided on said strain buffer layer and provided with electrodes thereon to be connected to selected ones of said lead patterns.
Claim 3
Dependent Claim
16 words
An optical optoelectronic integrated circuit according to claim 1, wherein said optical device is a photodiode.
Claim 4
Dependent Claim
17 words
An optical optoelectronic integrated circuit according to claim 1, wherein said optical device is a semiconductor laser.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-12-31 | 1994-07-02 | 1995-01-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-12-31 | 1998-07-02 | 1999-01-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-12-31 | 2002-07-02 | 2003-01-01 | $7700.00 | Window Closed / Lapsed |