Patent US1141089A successfully refreshed from Google Patents.
Patent US4980791A successfully refreshed from Google Patents.
US4980791A
Expired / Lapsed
US
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Universal power supply monitor circuit
Assignee: Semiconductor Components Industries LLC
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Filing: 1990-02-05
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Granted: 1990-12-25
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Expires: 2010-02-05
Abstract
Abstract A power supply monitoring circuit for operating in a plurality of modes comprising first and second single input comparators coupled to first and second inputs, respectively, for sensing the voltage levels thereof. A reference circuit for generating a reference voltage at a first output. A programming circuit coupled to the outputs of the first and second single input comparators and being responsive to a third input for providing the selection of plurality of operation modes and for providing second and third outputs which are function of the voltage levels appearing at the first and second inputs.
Inventors
- 👤 Jade H. Alberkrack
- 👤 Eric W. Tisinger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:33
CPC Classifications
G; G11; G11C; G11C5/00; G01; G01R; G01R19/00; G01R19/165; G01R19/16533; G01R19/16538
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
103 words
A power supply monitor circuit for operating in a plurality of modes, comprising: means coupled to first and second inputs of the monitor circuit for sensing the voltage levels applied thereat; reference means for generating a reference voltage at a first output; and programming means coupled to said means and being responsive to a signal applied at a third input of the monitor circuit for providing the selection of said plurality of modes and for providing second and third output signals at respective outputs of the monitor circuit which are a function of the voltage levels appearing at said first and second inputs.
Claim 2
Dependent Claim
103 words
A power supply monitor circuit for operating in a plurality of modes, comprising: means coupled to first and second inputs of the monitor circuit for sensing the voltage levels applied thereat; reference means for generating a reference voltage at a first output; and programming means coupled to said means and being responsive to a signal applied at a third input of the monitor circuit for providing the selection of said plurality of modes and for providing second and third output signals at respective outputs of the monitor circuit which are a function of the voltage levels appearing at said first and second inputs.
Claim 3
Dependent Claim
82 words
The power supply monitor circuit according to claim 1 wherein said means includes: a first comparator having a first input coupled to said first input of the monitor circuit, a second input coupled to a first independent voltage source, and an output coupled to said programming means; and a second comparator having a first input coupled to said second input of the monitor circuit, a second input coupled to a second independent voltage source, and an output coupled to said programming means.
Claim 4
Dependent Claim
257 words
The power supply monitor circuit according to claim 2 wherein said programming means includes: a first comparator having a first input coupled to said third input of the monitor circuit, a second input coupled to a third independent voltage source which provides a voltage level that is greater than the voltage level of said reference voltage, and an output; a second comparator having a first input coupled to said third input of the monitor circuit, a second input coupled to a fourth independent voltage source which provides a voltage level that is less than the voltage level of said reference voltage, and an output; a first exclusive OR gate having a first input coupled to said output of said first comparator of said programming means, a second input coupled to said output of said first comparator of said means, and an output; a second exclusive OR gate having a first input coupled to said output of said second comparator of said programming means, a second input coupled to said output of said second comparator of said means, and an output; a first transistor having a collector coupled to said second output of the monitor circuit, a base coupled to said output of said first exclusive OR gate, and an emitter coupled to a first power supply voltage terminal; and a second transistor having a collector coupled to said third output of the monitor circuit, a base coupled to said output of said second exclusive OR gate, and an emitter coupled to said first power supply voltage terminal.
Claim 5
Dependent Claim
114 words
In an integrated circuit, a power supply monitor circuit for operating in a plurality of modes, comprising: means coupled to first and second pins of the monitor circuit for sensing the voltage levels thereof; reference means for generating a reference voltage at a third pin of the monitor circuit; and programming means coupled to said means and being responsive to a voltage signal applied at a fourth pin of the monitor circuit for providing the selection of said plurality of modes, said programming means provides outputs at fifth and sixth pins of the monitor circuit which are a function of the voltage levels appearing at said first and second pins of the monitor circuit.
Claim 6
Dependent Claim
114 words
In an integrated circuit, a power supply monitor circuit for operating in a plurality of modes, comprising: means coupled to first and second pins of the monitor circuit for sensing the voltage levels thereof; reference means for generating a reference voltage at a third pin of the monitor circuit; and programming means coupled to said means and being responsive to a voltage signal applied at a fourth pin of the monitor circuit for providing the selection of said plurality of modes, said programming means provides outputs at fifth and sixth pins of the monitor circuit which are a function of the voltage levels appearing at said first and second pins of the monitor circuit.
Claim 7
Dependent Claim
82 words
The power supply monitor circuit according to claim 4 wherein said means includes; a first comparator having a first input coupled to said first pin of the monitor circuit, a second input coupled to a first independent voltage source, and an output coupled to said programming means; and a second comparator having a first input coupled to said second pin of the monitor circuit, a second input coupled to a second independent voltage source, and an output coupled to said programming means.
Claim 8
Dependent Claim
257 words
The power supply monitor circuit according to claim 5 wherein said programming means includes: a first comparator having a first input coupled to said fourth pin of the monitor circuit, a second input coupled to a third independent voltage source which provides a voltage level that is greater than the voltage level of said reference voltage, and an output; a second comparator having a first input coupled to said fourth pin of the monitor circuit, a second input coupled to a fourth independent voltage source which provides a voltage level that is less than the voltage level of said reference voltage, and an output; a first exclusive OR gate having a first input coupled to said output of said first comparator of said programming means, a second input coupled to said output of said first comparator of said means, and an output; a second exclusive OR gate having a first input coupled to said output of said second comparator of said programming means, a second input coupled to said output of said second comparator of said means, and an output; a first transistor having a collector coupled to said fifth pin of the monitor circuit, a base coupled to said output of said first exclusive OR gate, and an emitter coupled to a first power supply voltage terminal; and a second transistor having a collector coupled to said sixth pin of the monitor circuit, a base coupled to said output of said second exclusive OR gate, and an emitter coupled to said first power supply voltage terminal.
Claim 9
Dependent Claim
151 words
An integrated power supply monitor circuit in an 8-pin package having a power supply pin and a ground pin, for operating in a plurality of modes, comprising: means coupled to first and second pins of the integrated power supply monitor circuit for sensing the voltage levels thereof; reference means coupled to the power supply pin of the integrated power supply monitor circuit for generating a reference voltage at a third pin of the integrated power supply monitor circuit; and programming means coupled to said means and being responsive to a voltage signal applied at a fourth pin of the integrated power supply monitor circuit for providing the selection of said plurality of modes and for providing outputs at fifth and sixth pins of the integrated power supply monitor circuit which are a function of the voltage levels appearing at said first and second pins of the integrated power supply monitor circuit.
Claim 10
Dependent Claim
151 words
An integrated power supply monitor circuit in an 8-pin package having a power supply pin and a ground pin, for operating in a plurality of modes, comprising: means coupled to first and second pins of the integrated power supply monitor circuit for sensing the voltage levels thereof; reference means coupled to the power supply pin of the integrated power supply monitor circuit for generating a reference voltage at a third pin of the integrated power supply monitor circuit; and programming means coupled to said means and being responsive to a voltage signal applied at a fourth pin of the integrated power supply monitor circuit for providing the selection of said plurality of modes and for providing outputs at fifth and sixth pins of the integrated power supply monitor circuit which are a function of the voltage levels appearing at said first and second pins of the integrated power supply monitor circuit.
Claim 11
Dependent Claim
89 words
The integrated power supply monitor circuit according to claim 7 wherein said means includes; a first comparator having a first input coupled to said first pin of the integrated power supply monitor circuit, a second input coupled to a first independent voltage source, and an output coupled to said programming means; and a second comparator having a first input coupled to said second pin of the integrated power supply monitor circuit, a second input coupled to a second independent voltage source, and an output coupled to said programming means.
Claim 12
Dependent Claim
278 words
The integrated power supply monitor circuit according to claim 8 wherein said programming means includes: a first comparator having a first input coupled to said fourth pin of the integrated power supply monitor circuit, a second input coupled to a third independent voltage source which provides a voltage level that is greater than the voltage level of said reference voltage, and an output; a second comparator having a first input coupled to said fourth pin of the integrated power supply monitor circuit, a second input coupled to a fourth independent voltage source which provides a voltage level that is less than the voltage level of said reference voltage, and an output; a first exclusive OR gate having a first input coupled to said output of said first comparator of said programming means, a second input coupled to said output of said first comparator of said means, and an output; a second exclusive OR gate having a first input coupled to said output of said second comparator of said programming means, a second input coupled to said output of said second comparator of said means, and an output; a first transistor having a collector coupled to said fifth pin of the integrated power supply monitor circuit, a base coupled to said output of said first exclusive OR gate, and an emitter coupled to the ground pin of the integrated power supply monitor circuit; and a second transistor having a collector coupled to said sixth pin of the integrated power supply monitor circuit, a base coupled to said output of said second exclusive OR gate, and an emitter coupled to the ground pin of the integrated power supply monitor circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-12-24 | 1994-06-25 | 1994-12-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-12-24 | 1998-06-25 | 1998-12-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-12-24 | 2002-06-25 | 2002-12-25 | $7700.00 | Window Closed / Lapsed |