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US4975915A Expired / Lapsed US ⏱️ 0.0 years remaining

Data transmission and reception apparatus and method

Assignee: Sony Corp
•
Filing: 1989-04-13
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Granted: 1990-12-04
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Expires: 2009-04-13
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Abstract

Abstract A data transmission and reception apparatus and method capable of selecting either of two modes having the same sampling frequency in which the bit numbers of one data unit are either m or n (which are integral numbers and m>n), while using the same error correction encoder and decoder for the two modes, by inserting m-n bits of dummy data bits into the n-bit data so as to handle it as m-bit data during the processes of error correction encoding and decoding.

Inventors

  • 👤 Yoichiro Sako
  • 👤 Kentaro Odaka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 23:40
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809; G11B20/10527; G11B20/12; G11B20/1201; G11B20/1207; G11B20/1208; H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/92; H04N5/928; H04N9/00; H04N9/79; H04N9/7921; H04N9/7925; G11B2020/10537; G11B2020/10546; G11B2020/1087; G11B2220/00; G11B2220/90

Claims Analysis

Total Claims: 44
Claim 1
Independent Claim 280 words
A data transmission apparatus capable of selecting a first mode in which one unit of data is made up of m bits and a second mode in which one unit of data is composed of n bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising: (a) error correction encoding means commonly used for the first and second modes; (b) first insertion means for inserting m-n bits of dummy data into the units of data; (c) first elimination means for eliminating the inserted bits from the data; and (d) addition means for adding an information header, including at least a block synchronization signal to define blocks of data units, to the data, wherein in the first mode, data units composed of m bits each are encoded by the error correction encoding means to produce first mode, encoding-processed data, the addition means adds a first block synchronization signal to each block of the first mode encoding-processed data and outputs it, and data output from the addition means is transmitted, and in the second mode, the first insertion means inserts bits in each data unit composed of n bits so as to transform it into one unit of m-bit data which is supplied to the error correction encoding means where it is encoded and output as second mode encoding-processed data, the first elimination means eliminates the inserted bits from the output second mode encoding-processed data so as to output units of n bit data, these units of n bit data from the first elimination means are supplied to the addition means which adds a second block synchronization signal to each block of n-bit data and transmits it.
Claim 2
Dependent Claim 280 words
A data transmission apparatus capable of selecting a first mode in which one unit of data is made up of m bits and a second mode in which one unit of data is composed of n bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising: (a) error correction encoding means commonly used for the first and second modes; (b) first insertion means for inserting m-n bits of dummy data into the units of data; (c) first elimination means for eliminating the inserted bits from the data; and (d) addition means for adding an information header, including at least a block synchronization signal to define blocks of data units, to the data, wherein in the first mode, data units composed of m bits each are encoded by the error correction encoding means to produce first mode, encoding-processed data, the addition means adds a first block synchronization signal to each block of the first mode encoding-processed data and outputs it, and data output from the addition means is transmitted, and in the second mode, the first insertion means inserts bits in each data unit composed of n bits so as to transform it into one unit of m-bit data which is supplied to the error correction encoding means where it is encoded and output as second mode encoding-processed data, the first elimination means eliminates the inserted bits from the output second mode encoding-processed data so as to output units of n bit data, these units of n bit data from the first elimination means are supplied to the addition means which adds a second block synchronization signal to each block of n-bit data and transmits it.
Claim 3
Dependent Claim 27 words
A data transmission apparatus according to claim 1, wherein the first insertion means further comprises means for compressing m bits of data to n bits of data.
Claim 4
Dependent Claim 35 words
A data transmission apparatus according to claim 1, wherein the error correction encoding means further comprises a word/symbol data converter for dividing the unit data into upper symbol bit data and lower symbol bit data.
Claim 5
Dependent Claim 37 words
A data transmission apparatus according to claim 3, wherein the addition means further comprises a bit number conversion circuit for modifying the bit pattern of the symbol bit data and reducing the direct current (DC) component thereof.
Claim 6
Dependent Claim 25 words
A data transmission apparatus according to claim 4, wherein the first insertion means adds the dummy data as the upper bits of the unit data.
Claim 7
Dependent Claim 29 words
A data transmission apparatus according to claim 4, wherein the first insertion means adds the dummy data as the upper bits and the lower bits to each data unit.
Claim 8
Dependent Claim 39 words
A data transmission apparatus according to claim 1, wherein the addition means for adding an information header also adds to the data a mode identification signal indicating whether the first mode is selected or the second mode is selected.
Claim 9
Dependent Claim 232 words
Apparatus for receiving transmission data transmitted from the data transmission apparatus according to claim 1, the apparatus, comprising: (a) synchronization detection means for detecting the first and second block synchronization signals from the transmission data; (b) switching signal generating means connected to the synchronization detection means for deciding whether the detected block synchronization signal is the first block synchronization signal or the second block synchronization signal and generating a corresponding mode switching signal; (c) second insertion means for inserting into the data units m-n bits of dummy data; (d) error correction decoding means used commonly for the first and the second mode; and (e) second elimination means for eliminating the inserted bits from the data; wherein when the first mode is selected by the mode switching signal, the error correction decoding means error correction decodes the data from the synchronization detection means and the m-bit data unit data is decoded, and when the second mode is selected by the mode switching signal, the data from the synchronization detection means is supplied to the second insertion means where the inserted bits are inserted into each unit of the n-bit data to make units of m-bit data, this data is supplied to the error correction decoding means and is decoding-processed, the decoding-processed data is fed to the second elimination means where the inserted bits are eliminated so as to decode the n-bit data units.
Claim 10
Dependent Claim 38 words
Apparatus for receiving transmission data with an identification code for identifying the first mode and the second mode according to claim 8, wherein the switching signal generating means decodes the identification signal to form a mode switching signal.
Claim 11
Dependent Claim 219 words
Apparatus for receiving data selectively transmitted in a first mode in which one unit is made up of m-bits or in second mode in which one unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising: (a) switching signal generating means for deciding whether the received data is in the first mode or the second mode and generating a corresponding mode switching signal; (b) insertion means for selectively inserting m-n bits of dummy data into each n-bit data unit; (c) error correction decoding means used commonly for the first and second modes; and (d) elimination means for eliminating the inserted bits from the data; wherein when the mode switching signal corresponds to the first mode, the error correction decoding means performs error correction decoding of the received data ad the m-bit data units are decoded, when the mode switching signal corresponds to the second mode, the received data is supplied to the insertion means so that the inserted bits are inserted into each n-bit data unit to make m-bit data units, this data is supplied to the error correction decoding means where the data is decoding-processed, and the decoding-processed data is fed to the elimination means and the inserted bits are eliminated so as to decode the n-bit data units.
Claim 12
Dependent Claim 219 words
Apparatus for receiving data selectively transmitted in a first mode in which one unit is made up of m-bits or in second mode in which one unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising: (a) switching signal generating means for deciding whether the received data is in the first mode or the second mode and generating a corresponding mode switching signal; (b) insertion means for selectively inserting m-n bits of dummy data into each n-bit data unit; (c) error correction decoding means used commonly for the first and second modes; and (d) elimination means for eliminating the inserted bits from the data; wherein when the mode switching signal corresponds to the first mode, the error correction decoding means performs error correction decoding of the received data ad the m-bit data units are decoded, when the mode switching signal corresponds to the second mode, the received data is supplied to the insertion means so that the inserted bits are inserted into each n-bit data unit to make m-bit data units, this data is supplied to the error correction decoding means where the data is decoding-processed, and the decoding-processed data is fed to the elimination means and the inserted bits are eliminated so as to decode the n-bit data units.
Claim 13
Dependent Claim 26 words
Apparatus for receiving data according to claim 10, wherein the switching signal generating means comprises means for detecting a block synchronization signal from the received data.
Claim 14
Dependent Claim 285 words
Apparatus for recording a PCM audio signal on a magnetic medium by magnetic heads, capable of selecting a first mode in which one data unit is made up of m-bits and a second mode in which one data unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising: (a) error correction encoding means commonly used for the first and second modes; (b) insertion means for inserting m-n bits of dummy data into the data units; (c) elimination means for eliminating the inserted bits from the data; and (d) addition means for adding to the data an information header including at least a block synchronization signal to define blocks of data units, wherein in the first mode, data units composed of m-bits each are subjected to an encoding process at the error correction encoding means to produce first mode, encoding-processed data, a block synchronization signal for the m-bit data is added to define each block of the first mode, encoding-processed data at the addition means, and data output from the addition means is transmitted, and wherein in the second mode, the inserted bits are inserted into each n-bit data unit at the insertion means so as to make an m-bit data unit, the m-bit data units are encoded by the error correction encoding means to produce second mode, encoding-processed data, the inserted bits are eliminated from the second mode, encoding-processed data at the elimination means to produce n-bit data units which are supplied to the addition means where a block synchronization signal for n-bit data is added to each block of n-bit data and each such block is thereafter transmitted to the magnetic heads and magnetically recorded.
Claim 15
Dependent Claim 285 words
Apparatus for recording a PCM audio signal on a magnetic medium by magnetic heads, capable of selecting a first mode in which one data unit is made up of m-bits and a second mode in which one data unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising: (a) error correction encoding means commonly used for the first and second modes; (b) insertion means for inserting m-n bits of dummy data into the data units; (c) elimination means for eliminating the inserted bits from the data; and (d) addition means for adding to the data an information header including at least a block synchronization signal to define blocks of data units, wherein in the first mode, data units composed of m-bits each are subjected to an encoding process at the error correction encoding means to produce first mode, encoding-processed data, a block synchronization signal for the m-bit data is added to define each block of the first mode, encoding-processed data at the addition means, and data output from the addition means is transmitted, and wherein in the second mode, the inserted bits are inserted into each n-bit data unit at the insertion means so as to make an m-bit data unit, the m-bit data units are encoded by the error correction encoding means to produce second mode, encoding-processed data, the inserted bits are eliminated from the second mode, encoding-processed data at the elimination means to produce n-bit data units which are supplied to the addition means where a block synchronization signal for n-bit data is added to each block of n-bit data and each such block is thereafter transmitted to the magnetic heads and magnetically recorded.
Claim 16
Dependent Claim 19 words
Apparatus according to claim 12, further comprising means for compressing m-bit data to n-bit data in the insertion means.
Claim 17
Dependent Claim 31 words
Apparatus according to claim 12, further comprising a word/symbol data converter for dividing data units into upper symbol bit data and lower symbol bit data in the error correction encoding means.
Claim 18
Dependent Claim 33 words
Apparatus according to claim 14, further comprising a bit number conversion circuit for modifying the bit pattern of the symbol bit data and reducing the direct current component thereof in the addition means.
Claim 19
Dependent Claim 21 words
Apparatus according to claim 15, wherein the insertion means adds the dummy data as the upper bits of the data unit.
Claim 20
Dependent Claim 25 words
Apparatus according to claim 15, wherein the insertion means adds the dummy data as the upper bits and the lower bits to each data unit.
Claim 21
Dependent Claim 35 words
Apparatus according to claim 12, wherein the addition means for adding an information header adds to the data a mode identification signal indicating whether the first mode is selected or the second mode is selected.
Claim 22
Dependent Claim 47 words
Apparatus according to claim 12, wherein the first mode is selected when a magnetic tape medium of metal evaporating type is used for transmitting the data and the second mode is selected when a magnetic tape medium of metal powder type is used for transmitting the data.
Claim 23
Dependent Claim 181 words
A data transmission method for selecting a first mode in which one unit of data is made up of m-bits and a second mode in which one unit of data is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising the steps of: adding an information header, including at least a block synchronization signal to define blocks of data units, to the data, in the first mode, error correction encoding data units composed of m-bits each to produce first mode error-corrected data, adding a first block synchronization signal to each block of the first mode error-corrected data and transmitting it; and in the second mode, inserting m-n bits of dummy data into each n-bit data unit so as to make it an m-bit data unit, error correction encoding the m-bit data units to produce second mode error corrected data, eliminating the inserted bits from the second mode error corrected data so as to output n-bit data units, adding a second block synchronization signal to each block of n-bit data units and transmitting it.
Claim 24
Dependent Claim 181 words
A data transmission method for selecting a first mode in which one unit of data is made up of m-bits and a second mode in which one unit of data is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising the steps of: adding an information header, including at least a block synchronization signal to define blocks of data units, to the data, in the first mode, error correction encoding data units composed of m-bits each to produce first mode error-corrected data, adding a first block synchronization signal to each block of the first mode error-corrected data and transmitting it; and in the second mode, inserting m-n bits of dummy data into each n-bit data unit so as to make it an m-bit data unit, error correction encoding the m-bit data units to produce second mode error corrected data, eliminating the inserted bits from the second mode error corrected data so as to output n-bit data units, adding a second block synchronization signal to each block of n-bit data units and transmitting it.
Claim 25
Dependent Claim 31 words
A data transmission method according to claim 20, wherein the step of inserting dummy data of m-n bits further comprises the step of compressing m-bits of data to n-bits of data.
Claim 26
Dependent Claim 33 words
A data transmission method according to claim 20, wherein the error correction encoding step further comprises the step of dividing the unit data into upper symbol bit data and lower symbol bit data.
Claim 27
Dependent Claim 36 words
A data transmission method according to claim 22, wherein the synchronization signal addition step further comprises the step of modifying the bit pattern of the symbol bit data and reducing the direct current (DC) component thereof.
Claim 28
Dependent Claim 31 words
A data transmission method according to claim 23, wherein the insertion step of inserting dummy data of m-n bits adds the dummy data as the upper bits of the data unit.
Claim 29
Dependent Claim 35 words
A data transmission method according to claim 23, wherein the insertion step of inserting dummy data of m-n bits adds the dummy data as the upper bits and the lower bits to each data unit.
Claim 30
Dependent Claim 39 words
A data transmission method according to claim 20, wherein the addition step of adding an information header also adds to the data a mode identification signal indicating whether the first mode is selected or the second mode is selected.
Claim 31
Dependent Claim 138 words
A method for receiving transmitted data generated by the data transmission method according to claim 20, comprising the steps of: (a) detecting the first or the second block synchronization signal from the transmission data; (b) deciding whether the detected block synchronization signal is the first block synchronization signal or the second block synchronization signal and generating a mode switching signal; (c) when the first mode is selected according to the mode switching signal, error correction decoding the data to produce m-bit data units; (d) when the second mode is selected by the mode switching signal, (i) inserting m-n bits of dummy data into each n-bit data unit to make an m-bit data unit, (ii) decoding-processing the m-bit data units, and (iii) eliminating the inserted bits from the m-bit data units so as to decode the n-bit data units.
Claim 32
Dependent Claim 44 words
A method for receiving transmission data with an identification code for identifying the first mode and the second mode according to claim 27, wherein the mode switching signal generating step includes the step of decoding the identification signal to form the mode switching signal.
Claim 33
Independent Claim 147 words
A method for receiving data selectively transmitted in a first mode in which one unit is made up of m-bits or in second mode in which one unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising the steps of: (a) deciding whether the received data is in the first mode or the second mode and generating a corresponding mode switching signal; (b) when the mode switching signal corresponds to the first mode, error correction decoding the received data to generate decoded m-bit data units; (c) when the mode switching signal corresponds to the second mode, (i) inserting m-n bits of dummy data into each n-bit data unit to make an m-bit data unit, (ii) error-correcting the m-bit data units, and (iii) eliminating the inserted bits from the decoding-processed data so as to decode the n-bit data units.
Claim 34
Independent Claim 147 words
A method for receiving data selectively transmitted in a first mode in which one unit is made up of m-bits or in second mode in which one unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising the steps of: (a) deciding whether the received data is in the first mode or the second mode and generating a corresponding mode switching signal; (b) when the mode switching signal corresponds to the first mode, error correction decoding the received data to generate decoded m-bit data units; (c) when the mode switching signal corresponds to the second mode, (i) inserting m-n bits of dummy data into each n-bit data unit to make an m-bit data unit, (ii) error-correcting the m-bit data units, and (iii) eliminating the inserted bits from the decoding-processed data so as to decode the n-bit data units.
Claim 35
Dependent Claim 28 words
A method for receiving data according to claim 29, wherein the switching signal generating step comprises the steps of detecting a block synchronization signal from the received data.
Claim 36
Independent Claim 172 words
A method for recording a PCM audio signal on a magnetic medium by magnetic heads, capable of selecting a first mode in which one data unit is made up of m-bits and a second mode in which one data unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising the steps of: in the first mode, error correction encoding data units composed of m-bits each, adding a first block synchronization signal to each block of the error correction encoded data and transmitting it; and in the second mode, inserting m-n bits of dummy data into each n-bit data unit so as to make and m-bit data unit, error correction encoding the thus produced m-bit data units to produce encoding-processed data, eliminating the m-n bits from the encoding-processed data to produce n-bit data units, adding an information header including at least a second block synchronization signal to each block of n-bit data units and transmitting it to the magnetic heads and magnetically recording it.
Claim 37
Independent Claim 172 words
A method for recording a PCM audio signal on a magnetic medium by magnetic heads, capable of selecting a first mode in which one data unit is made up of m-bits and a second mode in which one data unit is composed of n-bits (m>n), where m and n are integral numbers, with the same sampling frequency, comprising the steps of: in the first mode, error correction encoding data units composed of m-bits each, adding a first block synchronization signal to each block of the error correction encoded data and transmitting it; and in the second mode, inserting m-n bits of dummy data into each n-bit data unit so as to make and m-bit data unit, error correction encoding the thus produced m-bit data units to produce encoding-processed data, eliminating the m-n bits from the encoding-processed data to produce n-bit data units, adding an information header including at least a second block synchronization signal to each block of n-bit data units and transmitting it to the magnetic heads and magnetically recording it.
Claim 38
Dependent Claim 27 words
Apparatus according to claim 31, further comprising the steps of compressing m-bits of data to n-bits data in the step of inserting dummy data of m-n bits.
Claim 39
Dependent Claim 30 words
Apparatus according to claim 31, further comprising the steps of dividing the data unit into upper symbol bit data and lower symbol bit data in the error correction encoding step.
Claim 40
Dependent Claim 30 words
Apparatus according to claim 33, further comprising the step of modifying the bit pattern of the symbol bit data and reducing the direct current component thereof in the adding step.
Claim 41
Dependent Claim 27 words
Apparatus according to claim 34, wherein the step of inserting dummy data of m-n bits adds the dummy data as the upper bits of the data unit.
Claim 42
Dependent Claim 31 words
Apparatus according to claim 34, wherein the step of inserting dummy data of m-n bits adds the dummy data as the upper bits and the lower bits to each data unit.
Claim 43
Dependent Claim 34 words
Apparatus according to claim 31, wherein the step of adding an information header adds to the data a mode identification signal indicating whether the first mode is selected or the second mode is selected.
Claim 44
Dependent Claim 51 words
Apparatus according to claim 31, wherein the first mode is selected when a magnetic tape medium of metal evaporating type is used as the medium of data transmission and the second mode is selected when a magnetic tape medium of metal powder type is used as the medium of data transmission.

References Cited (Backward Citations)

US4320511A Cited
US4500926A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-12-03 1994-06-04 1994-12-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-12-03 1998-06-04 1998-12-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-12-03 2002-06-04 2002-12-04 $7700.00 Window Closed / Lapsed

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