Patent US4970474A successfully refreshed from Google Patents.
US4970474A
Expired / Lapsed
US
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Analog/digital phase locked loop
Assignee: Delphi Technologies Inc
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Filing: 1989-08-14
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Granted: 1990-11-13
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Expires: 2009-08-14
Abstract
Abstract A phase locked loop (PLL) with a narrow bandwidth, and small phase noise which is particularly useful in a FM stereo decoder includes both analog and digital circuitry and has the advantages of both types of systems, performing better than standard PLL's without the need for any external components. An externally referenced digital voltage controlled oscillator, establishes the center frequency of the PLL while analog portions of the circuit permits accurate locking to the input signal and provides a high level of quietness of the system.
Inventors
- 👤 Richard A. Kennedy
- 👤 Gregory J. Manlove
- 👤 Jeffrey J. Marrah
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:03
CPC Classifications
H; H03; H03D; H03D1/00; H03D1/22; H03D1/2209; H03D1/2236; H03L; H03L7/00
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
193 words
A phase locked loop comprising analog/digital voltage controlled oscillator means, first phase detector means adapted to receive an FM composite input signal including a pilot signal, first filter means responsive to the output of said first phase detector means for providing an analog control input to said analog/digital voltage controlled oscillator means. said analog/digital voltage controlled oscillator means receiving a reference input frequency signal from a reference oscillator source and including means providing an output signal which on average is equal to said pilot signal, an analog phase locked loop connected in the feedback path between said analog/digital voltage controlled oscillator means and said first phase detector means for averaging the output of said analog/digital controlled oscillator means, said analog phase locked loop comprising second phase detector means adapted to receive the output of said analog/digital voltage controlled oscillator means, analog voltage controlled oscillator means, second filter means responsive to the output of said second phase detector means for providing a control input to said analog voltage controlled oscillator means, means connecting the output of said analog voltage controlled oscillator means as a second input to said first and second phase detector means.
Claim 2
Dependent Claim
193 words
A phase locked loop comprising analog/digital voltage controlled oscillator means, first phase detector means adapted to receive an FM composite input signal including a pilot signal, first filter means responsive to the output of said first phase detector means for providing an analog control input to said analog/digital voltage controlled oscillator means. said analog/digital voltage controlled oscillator means receiving a reference input frequency signal from a reference oscillator source and including means providing an output signal which on average is equal to said pilot signal, an analog phase locked loop connected in the feedback path between said analog/digital voltage controlled oscillator means and said first phase detector means for averaging the output of said analog/digital controlled oscillator means, said analog phase locked loop comprising second phase detector means adapted to receive the output of said analog/digital voltage controlled oscillator means, analog voltage controlled oscillator means, second filter means responsive to the output of said second phase detector means for providing a control input to said analog voltage controlled oscillator means, means connecting the output of said analog voltage controlled oscillator means as a second input to said first and second phase detector means.
Claim 3
Dependent Claim
35 words
The invention defined in claim 1 wherein said analog/digital voltage controlled oscillator means has a center frequency equal to the frequency of said pilot signal and is referenced to the output of a crystal oscillator.
Claim 4
Dependent Claim
25 words
The invention defined in claim 1 wherein the means providing an output signal which on average is equal to said pilot signal includes divider means.
Claim 5
Dependent Claim
193 words
A digital phase locked loop containing an analog phase locked loop in the feedback path thereof, comprising first phase detector means adapted to receive a first input signal, a first voltage controlled oscillator including a jitter divider, a reference oscillator connected with said jitter divider for providing a reference input signal at a predetermined frequency, first filter means responsive to the output of said first phase detector means for providing a control voltage input to said first voltage controlled oscillator, said first voltage controlled oscillator further including frequency control means for controlling said jitter divider in response to said control voltage input to provide an output signal having on average the same frequency as said first input signal, said analog phase locked loop means comprising second phase detector means adapted to receive the output of said first voltage controlled oscillator, second voltage controlled oscillator means, second filter means responsive to the output of said second phase detector means and providing a control input to said second voltage controlled oscillator means, means connecting the output of said second voltage controlled oscillator means as a second input to said first and second phase detector means.
Claim 6
Dependent Claim
193 words
A digital phase locked loop containing an analog phase locked loop in the feedback path thereof, comprising first phase detector means adapted to receive a first input signal, a first voltage controlled oscillator including a jitter divider, a reference oscillator connected with said jitter divider for providing a reference input signal at a predetermined frequency, first filter means responsive to the output of said first phase detector means for providing a control voltage input to said first voltage controlled oscillator, said first voltage controlled oscillator further including frequency control means for controlling said jitter divider in response to said control voltage input to provide an output signal having on average the same frequency as said first input signal, said analog phase locked loop means comprising second phase detector means adapted to receive the output of said first voltage controlled oscillator, second voltage controlled oscillator means, second filter means responsive to the output of said second phase detector means and providing a control input to said second voltage controlled oscillator means, means connecting the output of said second voltage controlled oscillator means as a second input to said first and second phase detector means.
Claim 7
Dependent Claim
22 words
The invention defined in claim 4 wherein said first input signal is the 19 kHz pilot signal of an FM composite signal.
Claim 8
Dependent Claim
180 words
A digital phase locked loop containing an analog phase locked loop in the feedback path thereof, comprising first phase detector means adapted to receive a first input signal, digital controlled oscillator means, a reference oscillator connected with said digital controlled oscillator means for providing a reference input signal at a predetermined frequency, means responsive to the output of said first phase detector means for providing a control input to said digital controlled oscillator, said digital controlled oscillator means further including means responsive to said control input for providing an output signal having on average the same frequency as said first input signal, said analog phase locked loop comprising analog phase detector means adapted to receive the output of said digital controlled oscillator, analog voltage controlled oscillator means, second filter means responsive to the output of said analog phase detector means and providing a control voltage input to said analog voltage controlled oscillator means, means connecting the output of said analog voltage controlled oscillator means as a second input to said first phase detector means and said analog phase detector means.
Claim 9
Dependent Claim
180 words
A digital phase locked loop containing an analog phase locked loop in the feedback path thereof, comprising first phase detector means adapted to receive a first input signal, digital controlled oscillator means, a reference oscillator connected with said digital controlled oscillator means for providing a reference input signal at a predetermined frequency, means responsive to the output of said first phase detector means for providing a control input to said digital controlled oscillator, said digital controlled oscillator means further including means responsive to said control input for providing an output signal having on average the same frequency as said first input signal, said analog phase locked loop comprising analog phase detector means adapted to receive the output of said digital controlled oscillator, analog voltage controlled oscillator means, second filter means responsive to the output of said analog phase detector means and providing a control voltage input to said analog voltage controlled oscillator means, means connecting the output of said analog voltage controlled oscillator means as a second input to said first phase detector means and said analog phase detector means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-11-12 | 1994-05-14 | 1994-11-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-11-12 | 1998-05-14 | 1998-11-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-11-12 | 2002-05-14 | 2002-11-13 | $7700.00 | Window Closed / Lapsed |