Patent US4970473A successfully refreshed from Google Patents.
US4970473A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase locked loop having parallel comparators
Assignee: STMicroelectronics SRL
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Filing: 1989-05-31
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Granted: 1990-11-13
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Expires: 2009-05-31
Abstract
Abstract A circuit for high-efficiency tuning of video frequencies comprises a closed control loop including a voltage controlled oscillator, a frequeny divider, a phase comparator, and a low-pass filter cascade interconnected via respective inputs and outputs, with the filter output connected to the oscillator input to form the loop. The circuit further comprises a second comparator connected in parallel to the phase comparator between the frequency divider output and the low-pass filter input to compare a reference frequency to a frequency from the divider when the values of each frequencies lie far apart.
Inventors
- 👤 Loic Lietar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:32
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/197; H03L7/199; H03L7/08; H03L7/085; H03L7/087
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
187 words
A circuit for tuning video frequencies, of a type which comprises a closed loop including a voltage controlled oscillator, a first frequency divider, a phase comparator, an a low-pass filter, cascade interconnected via respective inputs and outputs, with the filter output connected to the oscillator input, characterized in that it comprises a second comparator connected in parallel to the phase comparator between the frequency divider output and the low-pass filter input to compare a reference frequency to the signal frequency output by the frequency divider when the values of such frequencies lie far apart, said phase comparator comprising a pair of flip-flop type storage cells having set and reset inputs, a pair of logic gates of the AND type having two inputs, one of which is negated, each gate having an output connected to a corresponding set input of one of said cells, and each cell having its corresponding output connected to the negated input of the gate associated with the other cell in said pair, with the other input of each gate arranged to receive a signal relating to one of said frequencies to be compared.
Claim 2
Dependent Claim
187 words
A circuit for tuning video frequencies, of a type which comprises a closed loop including a voltage controlled oscillator, a first frequency divider, a phase comparator, an a low-pass filter, cascade interconnected via respective inputs and outputs, with the filter output connected to the oscillator input, characterized in that it comprises a second comparator connected in parallel to the phase comparator between the frequency divider output and the low-pass filter input to compare a reference frequency to the signal frequency output by the frequency divider when the values of such frequencies lie far apart, said phase comparator comprising a pair of flip-flop type storage cells having set and reset inputs, a pair of logic gates of the AND type having two inputs, one of which is negated, each gate having an output connected to a corresponding set input of one of said cells, and each cell having its corresponding output connected to the negated input of the gate associated with the other cell in said pair, with the other input of each gate arranged to receive a signal relating to one of said frequencies to be compared.
Claim 3
Dependent Claim
100 words
A circuit according to claim 1, further comprising a second oscillator and a second frequency divider connected to the second oscillator and having a reset input, said second frequency divider being operative to supply said reference frequency, said first frequency divider having a rest input, characterized in that each of said cells has a respective reset input connected, via one of two logic OR gates, to a corresponding reset input of said first divider and said second divider, with each said OR gate adapted to receive a signal on another input relating to one of said frequencies to be compared.
Claim 4
Dependent Claim
63 words
A circuit according to claim 2, characterized in that said second comparator includes two flip-flop type storage cells, each having a set input to which the reference frequency and signal frequency are respectively applied, and having respective reset inputs to each of which is applied the corresponding rest signal which is applied to said second frequency divider and to said first frequency divider.
Claim 5
Dependent Claim
182 words
A circuit for video frequency tuning, of a type which comprises a loop including a voltage controlled oscillator, a first frequency divider, a phase comparator, and a low-pass filter, cascade interconnected via respective inputs and outputs and with the filter output connected to the oscillator input to close said loop, and further comprising a second oscillator whose output is connected to a second frequency divider to produce a reference frequency for application to an input of said phase comparator, characterized in that it comprises a second comparator connected in parallel to the phase comparator between the output of the first frequency divider and the low-pass filter input, and including in at least one of the comparators at least one pair of storage cells of the RS flip-flop type having respective set inputs each adapted to receive the corresponding outputs from said dividers via a logic gate, each said cell having a rest input connected to a corresponding reset input of each divider via respective logic OR gates, each OR gate having an input connected to the output of one of said dividers.
Claim 6
Dependent Claim
182 words
A circuit for video frequency tuning, of a type which comprises a loop including a voltage controlled oscillator, a first frequency divider, a phase comparator, and a low-pass filter, cascade interconnected via respective inputs and outputs and with the filter output connected to the oscillator input to close said loop, and further comprising a second oscillator whose output is connected to a second frequency divider to produce a reference frequency for application to an input of said phase comparator, characterized in that it comprises a second comparator connected in parallel to the phase comparator between the output of the first frequency divider and the low-pass filter input, and including in at least one of the comparators at least one pair of storage cells of the RS flip-flop type having respective set inputs each adapted to receive the corresponding outputs from said dividers via a logic gate, each said cell having a rest input connected to a corresponding reset input of each divider via respective logic OR gates, each OR gate having an input connected to the output of one of said dividers.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-11-12 | 1994-05-14 | 1994-11-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-11-12 | 1998-05-14 | 1998-11-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-11-12 | 2002-05-14 | 2002-11-13 | $7700.00 | Window Closed / Lapsed |