Carrier phase synchronizing circuit capable of recovering carrier phase synchronization at a short time

Claim 2

A carrier phase synchronizing circuit for use in a receiver for receiving a quadrature amplitude modulated signal as a received signal, said quadrature amplitude modulated signal being specified by a plurality of signal points on a phase plane having an origin and real and imaginary axes orthogonally crossing at said origin, said signal points being in one-to-one correspondence to a plurality of signal values, said quadrature amplitude modulated signal carrying a transmission data signal representative of a variable which is equal to one of said signal values at a time, said receiver comprising a demodulating means for demodulating said received signal into a demodulated signal, wherein the improvement comprises: phase rotating means connected to said demodulating means for phase rotating said demodulated signal on said phase plane around said origin in response to a control signal to produce a phase-rotated signal indicative of a phase-rotated value; first carrier phase error extracting means connected to said phase rotating means for carrying out a first predetermined extracting operation on said phase-rotated signal to produce a first carrier phase error estimation signal indicative of a first carrier phase estimated error value which is equal to a difference between said variable and said phase-rotated value; second carrier phase error extracting means connected to said phase rotating means for carrying out a second predetermined extracting operation on said phase-rotated signal to produce a second carrier phase error estimation signal indicative of a second carrier phase estimated error value which is equal to another difference between said variable and said phase-rotated value; comparing means connected to said second carrier phase error extracting means for comparing said second carrier phase estimated error value with a threshold value to produce a comparison result signal representative of a comparison result; selecting means connected to said comparing means and to said first and said second carrier phase error extracting means for selecting one of said first and said second carrier phase error estimation signals as a selected carrier phase error estimation signal in response to said comparison result signal; and low-pass filtering means connected to said selecting means for carrying out a low-pass filtering operation on said selected carrier phase error estimation signal to produce said control signal.

Claim 3

A carrier phase synchronizing circuit as claimed in claim 1, wherein said selecting means selects said first carrier phase error estimation signal as said selected carrier phase error estimation signal when said comparison result represents that said second carrier phase estimated error value is less than said threshold value, said selecting means selecting said second carrier phase error estimation signal as said selected carrier phase error estimation signal when said comparison result represents that said second carrier phase estimated error value is greater than said threshold value.

Claim 4

A carrier phase synchronizing circuit as claimed in claim 1, wherein said first carrier phase error extracting means comprises: detecting means connected to said phase rotating means for detecting, as a detected value, one of said signal values that is nearest to said phase-rotated value, said detecting means producing a detected signal indicative of said detected value; calculating means connected to said phase rotating means and to said detecting means for calculating a calculated error value which is equal to a difference between said detected value and said phase-rotated value, said calculating means producing a calculated error signal indicative of said calculated error value; and producing means connected to said calculating means for producing said calculated error signal as said first carrier phase error estimation signal.

Claim 5

A carrier phase synchronizing circuit as claimed in claim 1, said phase plane being divided into first through fourth quadrants, wherein said second carrier phase error extracting means comprises: clockwise rotating means connected to said phase rotating means for rotating said phase-rotated signal on said phase plane clockwise around said origin by an angle of (90n-45) degrees when said phase-rotated signal is present on an n-th quadrant where n is variable between 1 and 4, said clockwise rotating means producing a clockwise rotated signal which has an in-phase and a quadrature component on said real and said imaginary axes, respectively; averaging means connected to said clockwise rotating means for time averaging said quadrature component of the clockwise rotated signal to produce a time-averaged signal; and producing means connected to said averaging means for producing said time-averaged signal as said second carrier phase error estimation signal.

Claim 6

A carrier phase synchronizing circuit for use in a receiver for receiving a quadrature amplitude modulated signal as a received signal, said quadrature amplitude modulated signal being specified by a plurality of signal points on a phase plane having an origin and real and imaginary axes orthogonally crossing at said origin, said signal points being in one-to-one correspondence to a plurality of signal values, said quadrature amplitude modulated signal carrying a transmission data signal representative of a variable which is equal to one of said signal values at a time, said receiver comprising a demodulating means for demodulating said received signal into a demodulated signal, wherein the improvement comprises: phase rotating means connected to said demodulating means for phase rotating said demodulated signal on said phase plane around said origin in response to a phase rotation control signal to produce a phase-rotated signal indicative of a phase-rotated value; first carrier phase error extracting means connected to said phase rotating means for carrying out a first predetermined extracting operation on said phase-rotated signal to produce a first carrier phase error estimation signal indicative of a first carrier phase estimated error value which is equal to a difference between said variable and said phase-rotated value; low-pass filtering means having a controllable passband and connected to said first carrier phase error extracting means for carrying out a low-pass filtering operation on said first carrier phase error estimation signal with said controllable passband controlled by a bandwidth control signal to produce said phase rotation control signal; second carrier phase error extracting means connected to said phase rotating means for carrying out a second predetermined extracting operation on said phase-rotated signal to produce a second carrier phase error estimation signal indicative of a second carrier phase estimated error value which is equal to another difference between said variable and said phase-rotated value; comparing means connected to said second carrier phase error extracting means for comparing said second carrier phase estimated error value with a threshold value to produce a comparison result signal representative of a comparison result; and bandwidth control means connected to said comparing means and to said low-pass filtering means for controlling said low-pass filtering means in response to said comparison result signal to produce said bandwidth control signal.

Claim 7

A carrier phase synchronizing circuit for use in a receiver for receiving a quadrature amplitude modulated signal as a received signal, said quadrature amplitude modulated signal being specified by a plurality of signal points on a phase plane having an origin and real and imaginary axes orthogonally crossing at said origin, said signal points being in one-to-one correspondence to a plurality of signal values, said quadrature amplitude modulated signal carrying a transmission data signal representative of a variable which is equal to one of said signal values at a time, said receiver comprising a demodulating means for demodulating said received signal into a demodulated signal, wherein the improvement comprises: phase rotating means connected to said demodulating means for phase rotating said demodulated signal on said phase plane around said origin in response to a phase rotation control signal to produce a phase-rotated signal indicative of a phase-rotated value; first carrier phase error extracting means connected to said phase rotating means for carrying out a first predetermined extracting operation on said phase-rotated signal to produce a first carrier phase error estimation signal indicative of a first carrier phase estimated error value which is equal to a difference between said variable and said phase-rotated value; low-pass filtering means having a controllable passband and connected to said first carrier phase error extracting means for carrying out a low-pass filtering operation on said first carrier phase error estimation signal with said controllable passband controlled by a bandwidth control signal to produce said phase rotation control signal; second carrier phase error extracting means connected to said phase rotating means for carrying out a second predetermined extracting operation on said phase-rotated signal to produce a second carrier phase error estimation signal indicative of a second carrier phase estimated error value which is equal to another difference between said variable and said phase-rotated value; comparing means connected to said second carrier phase error extracting means for comparing said second carrier phase estimated error value with a threshold value to produce a comparison result signal representative of a comparison result; and bandwidth control means connected to said comparing means and to said low-pass filtering means for controlling said low-pass filtering means in response to said comparison result signal to produce said bandwidth control signal.

Claim 8

A carrier phase synchronizing circuit as claimed in claim 5, wherein said bandwidth control means controls said low-pass filtering means so as to expand said controllable passband when said comparison result represents that said second carrier phase estimated error value is greater than said threshold value, said bandwidth control means controlling said low-pass filtering means so as to narrow said controllable passband when said comparison result represents that said second carrier phase estimated error value is less than said threshold value.

Claim 9

A carrier phase synchronizing circuit as claimed in claim 5, wherein said first carrier phase error extracting means comprises: detecting means connected to said phase rotating means for detecting, as a detected value, one of said signal values that is nearest to said phase-rotated value, said detecting means producing a detected signal indicative of said detected value; calculating means connected to said phase rotating means and to said detecting means for calculating a calculated error value which is equal to a difference between said detected value and said phase-rotated value, said calculating means producing a calculated error signal indicative of said calculated error value; and producing means connected to said calculating means for producing said calculated error signal as said first carrier phase error estimation signal.

Claim 10

A carrier phase synchronizing circuit as claimed in claim 5, said phase plane being divided into first through fourth quadrants, wherein said second carrier phase error extracting means comprises; clockwise rotating means connected to said phase rotating means for rotating said phase-rotated signal on said phase plane clockwise around said origin by an angle of (90n-45) degrees when said phase-rotated signal is present on an n-th quadrant where n is variable between 1 and 4, said clockwise rotating means producing a clockwise rotated signal which has an in-phase and a quadrature component on said real and said imaginary axes, respectively; selecting means connected to said clockwise rotating means for selecting, as a selected rotated signal, one of said quadrature component of the clockwise rotated signal when said in-phase component of the clockwise rotated signal has a value which is greater than a predetermined value; averaging means connected to said selecting means for time averaging said selected rotated signal to produce a time-averaged signal; and producing means connected to said averaging means for producing said time-averaged signal as said second carrier phase error estimation signal.

Claim 11

A carrier phase synchronizing circuit for use in a receiver for receiving a quadrature amplitude modulated signal as a received signal, said quadrature amplitude modulated signal being specified by a plurality of signal points on a phase plane having an origin and real and imaginary axes orthogonally crossing at said origin, said signal points being in one-to-one correspondence to a plurality of signal values, said quadrture amplitude modulated signal carrying a transmission data signal representative of a variable which is equal to one of said signal values at a time, said receiver comprising demodulating means for demodulating said received signal into a demodulated signal, wherein the improvement comprises: equalizing means having varying correction coefficients and connected to said demodulating means for equalizing said demodulated signal into an equalized signal in response to a coefficient control signal; phase rotating means connected to said equalizing means for phase rotating said demodulated signal on said phase plane around said origin in response to a phase rotation control signal to produce a phase-rotated signal indicative of a phase-rotated value; first carrier phase error extracting means connected to said phase rotating means for carrying out a first predetermined extracting operation on said phase-rotated signal to produce a first carrier phase error estimation signal indicative of a first carrier phase estimated error value which is equal to a difference between said variable and said phase-rotated value; low-pass filtering means having a controllable passband and connected to said first carrier phase error extracting means for carrying out a low-pass filtering operation on said first carrier phase error estimation signal with said controllable-passband controlled by a bandwidth control signal to produce said phase rotation control signal; second carrier phase error extracting means connected to said phase rotating means for carrying out a second predetermined extracting operation on said phase-rotated signal to produce a second carrier phase error estimation signal indicative of a second carrier phase estimated error value which is equal to another difference between said variable and said phase-rotated value; comparing means connected to said second carrier phase error extracting means for comparing said second carrier phase estimated error value with a threshold value to produce a comparison result signal representative of a comparison result; bandwidth control means connected to said comparing means and to said low-pass filtering means for controlling said low-pass filtering means in response to said comparison result signal to produce said bandwidth control signal; and equalization control means connected to said comparing means and to said equalizing means for controlling said equalizing means in response to said comparison result signal to produce said coefficient control signal.

Claim 12

A carrier phase synchronizing circuit for use in a receiver for receiving a quadrature amplitude modulated signal as a received signal, said quadrature amplitude modulated signal being specified by a plurality of signal points on a phase plane having an origin and real and imaginary axes orthogonally crossing at said origin, said signal points being in one-to-one correspondence to a plurality of signal values, said quadrture amplitude modulated signal carrying a transmission data signal representative of a variable which is equal to one of said signal values at a time, said receiver comprising demodulating means for demodulating said received signal into a demodulated signal, wherein the improvement comprises: equalizing means having varying correction coefficients and connected to said demodulating means for equalizing said demodulated signal into an equalized signal in response to a coefficient control signal; phase rotating means connected to said equalizing means for phase rotating said demodulated signal on said phase plane around said origin in response to a phase rotation control signal to produce a phase-rotated signal indicative of a phase-rotated value; first carrier phase error extracting means connected to said phase rotating means for carrying out a first predetermined extracting operation on said phase-rotated signal to produce a first carrier phase error estimation signal indicative of a first carrier phase estimated error value which is equal to a difference between said variable and said phase-rotated value; low-pass filtering means having a controllable passband and connected to said first carrier phase error extracting means for carrying out a low-pass filtering operation on said first carrier phase error estimation signal with said controllable-passband controlled by a bandwidth control signal to produce said phase rotation control signal; second carrier phase error extracting means connected to said phase rotating means for carrying out a second predetermined extracting operation on said phase-rotated signal to produce a second carrier phase error estimation signal indicative of a second carrier phase estimated error value which is equal to another difference between said variable and said phase-rotated value; comparing means connected to said second carrier phase error extracting means for comparing said second carrier phase estimated error value with a threshold value to produce a comparison result signal representative of a comparison result; bandwidth control means connected to said comparing means and to said low-pass filtering means for controlling said low-pass filtering means in response to said comparison result signal to produce said bandwidth control signal; and equalization control means connected to said comparing means and to said equalizing means for controlling said equalizing means in response to said comparison result signal to produce said coefficient control signal.

Claim 13

A carrier phase synchronizing circuit as claimed in claim 9, wherein said equalization control means controls said equalizing means to make said equalizing means carry out a correction operation when said comparison result represents that said second carrier phase estimated error value is less than said threshold value, said equalization control means controlling said equalizing means to stop said correction operation when said comparison result represents that said second carrier phase estimated error value is greater than said threshold value.