Method and apparatus for transmitting and receiving characters using a balanced weight error correcting code

Claim 2

A distributed processing system for transmitting data blocks from a transmitting station to a receiving station, each data block representing one of a plurality of code words encoding one of a plurality of characters, the distributed processing system comprising: encoding means in the transmitting station for converting each of the plurality of characters to a predetermined corresponding one of a plurality of balanced weight fixed distance code words; transmitting means for transmitting said code words as data blocks; receiving means for receiving said transmitted data blocks; and decoding means in the receiving station for converting each of the received data blocks to the ones of said characters corresponding to the code words represented by said received data blocks.

Claim 3

The distributed processing system of claim 1 wherein said balanced weight fixed-distance code words contain an equal number of ones and zeroes and have a distance from each other of at least four.

Claim 4

The distributed processing system of claim 1, wherein the transmitting station includes a memory containing said balanced weight fixed-distance code words and wherein said encoding means further includes: encode circuitry for converting each of said characters to a corresponding one of said code words according to said predetermined correspondence.

Claim 5

The distributed processing system of claim 1, wherein said receiving station has a memory containing a plurality of target code words corresponding to said balanced weight fixed-distance code words, wherein said predetermined correspondence also exists between the plurality of characters and the target code words, wherein the received data blocks and the target code words consist of data bits, and wherein said decoding means further includes: detecting means for outputting one of a plurality of first match signals identifying a target code word identical to a received data block, for outputting one of said first plurality of first match signals identifying a target code word differing from a received data block by exactly one bit, and for outputting one of a plurality of second match signals when a target code word differs from a received data block by exactly one bit; and converting means coupled to said detecting means for outputting one of the plurality of characters according to said predetermined correspondence between said character and said target code word identified by said first match signal.

Claim 6

The distributed processing system of claim 4, wherein said detecting means of said receiving station includes a plurality of elements, each element including: an exclusive-OR portion for comparing respective bits of one target code word in the memory and one of the received data blocks; and a detecting logic portion coupled to said exclusive-OR portion for outputting said first and second match signals responsive to an output of said exclusive-OR portion.

Claim 7

The distributed processing system of claim 4, wherein said detecting means of said receiving station includes means for outputting an uncorrectable error signal when none of said target code words is identical to a received data block and none of said target code words differs from a received data block by exactly one bit.

Claim 8

The distributed processing system of claim 4, wherein said converting means of said receiving station includes a plurality of elements, each element including: a memory for storing one of said plurality of characters; and means for outputting said one stored character when a first match signal identifying a corresponding one of said target code words is output by said detecting means.

Claim 9

The distributed processing system of claim 1, wherein said encoding means includes means for converting each of the plurality of characters to a fourteen bit code word and wherein said decoding means includes means for converting a fourteen-bit received data block to a corresponding one of the plurality of characters.

Claim 10

The distributed processing system of claim 1, wherein said encoding means includes means for converting each of 260 characters to a predetermined one of said code words and wherein said decoding means includes means for converting each of said received data blocks into a predetermined one of said 260 characters.

Claim 11

The distributed processing system of claim 1, wherein said encoding means includes means for converting each of 257 characters to a predetermined one of said code words and wherein said decoding means includes means for converting each of said received data blocks into a predetermined one of said 257 characters.

Claim 12

The distributed processing system of claim 1, wherein said encoding means includes means for converting control code characters and data characters to code words and wherein said decoding means includes means for converting received data blocks to control code characters and data characters.

Claim 13

The distributed processing system of claim 1, wherein said encoding means includes means for transmitting a resynchronization data block preceding a first one of said data blocks and wherein said decoding means includes means for converting a received data block preceded by said resynchronization data block.

Claim 14

The distributed processing system of claim 1 further including: a clock recovery element in the receiving station for recovering a clock signal from said received data blocks.

Claim 15

A receiving station in a distributed processing system, wherein data blocks representing code words encoding ones of a plurality of characters are received by the receiving station, the receiving station comprising: receiving means for receiving said data blocks; and decoding means for converting each of the received data blocks to a predetermined one of said characters according to a balanced weight fixed-distance code having a predetermined correspondence between the characters and the code words.

Claim 16

A receiving station in a distributed processing system, wherein data blocks representing code words encoding ones of a plurality of characters are received by the receiving station, the receiving station comprising: receiving means for receiving said data blocks; and decoding means for converting each of the received data blocks to a predetermined one of said characters according to a balanced weight fixed-distance code having a predetermined correspondence between the characters and the code words.

Claim 17

The receiving station of claim 14, wherein said code words of said balanced weight fixed-distance code contain an equal number of binary ones and zeroes and have a distance of at least four.

Claim 18

The receiving station of claim 14 having a memory containing a plurality of target code words corresponding to code words of the balanced weight fixed-distance code, wherein said predetermined correspondence also exists between the plurality of characters and the target code words, wherein the received data blocks and the target code words consist of data bits, and wherein said decoding means further includes: detecting means for outputting one of a plurality of first match signals identifying a target code word identical to a received data block, for outputting one of said plurality of first match signals identifying a target code word differing from a received data block by exactly one bit, and for outputting one of a plurality of second match signals when a target code word differs from a received data block by exactly one bit; and converting means coupled to said detecting means for outputting one of the plurality of characters according to said predetermined correspondence between said character and said target code word identified by said first match signal.

Claim 19

The receiving station of claim 16, wherein said detecting means includes a plurality of elements, each element including: an exclusive-OR portion for comparing respective bits of one target code word in the memory and one of the received data blocks; and a detecting logic portion coupled to said exclusive-OR portion for outputting said first and second match signals responsive to the output of said exclusive-OR portion.

Claim 20

The receiving station of claim 16, wherein said detecting means includes means for outputting an uncorrectable error signal when none of said target code words is identical to a received data block and none of said target code words differs from a received data block by exactly one bit.

Claim 21

The receiving station of claim 16, wherein said converting means further includes a plurality of elements, each element including: a memory for storing one of said plurality of characters; and means for outputting said one stored character when a first match signal identifying a corresponding one of said target code words is output by said detecting means.

Claim 22

The receiving station of claim 14, wherein said decoding means includes means for converting fourteen-bit data blocks to corresponding ones of the plurality of characters.

Claim 23

The receiving station of claim 14, wherein said decoding means includes means for converting said received data blocks to corresponding ones of 260 characters.

Claim 24

The receiving station of claim 14, wherein said decoding means includes means for converting said received data blocks to corresponding ones of 257 characters.

Claim 25

The receiving station of claim 14, wherein said decoding means includes means for converting said received data blocks to corresponding ones of control code characters and data characters.

Claim 26

The receiving station of claim 14, wherein a first data block is preceded by a resynchronization data block, and wherein said decoding means includes means for converting a received data block preceded by said resynchronization data block to one of the plurality of characters.

Claim 27

The receiving station of claim 14, further including: a clock recovery element for recovering a clock signal from said received data blocks.

Claim 28

A transmitting station in a distributed processing system transmitting data blocks representing code words encoding a plurality of characters, comprising: encoding means for converting each of the plurality of characters to a predetermined corresponding one of a plurality of balanced weight fixed-distance code words; and transmitting means for transmitting said code words as data blocks.

Claim 29

A transmitting station in a distributed processing system transmitting data blocks representing code words encoding a plurality of characters, comprising: encoding means for converting each of the plurality of characters to a predetermined corresponding one of a plurality of balanced weight fixed-distance code words; and transmitting means for transmitting said code words as data blocks.

Claim 30

The transmitting station of claim 26, wherein said code words of said balanced weight fixed-distance code contain an equal number of ones and zeroes and have a distance of at least four.

Claim 31

The transmitting station of claim 26 having a memory containing said balanced weight fixed-distance code words and wherein said encoding means further includes: encode circuitry for converting each of said characters to a corresponding one of said code words according to said predetermined correspondence.

Claim 32

The transmitting station of claim 26, wherein said encoding means includes means for converting each of the plurality of characters to a corresponding fourteen-bit code word.

Claim 33

The transmitting station of claim 26, wherein said encoding means includes means for converting each of 257 characters to a corresponding code word.

Claim 34

The transmitting station of claim 26, wherein said encoding means includes means for converting each of 260 characters to a corresponding code word.

Claim 35

The transmitting station of claim 26, wherein said encoding means includes means for converting control code characters and data characters to corresponding code words.

Claim 36

The transmitting station of claim 26, wherein said encoding means includes means for transmitting a resynchronization data block preceding a first one of said data blocks.

Claim 39

The method of claim 34, wherein said encoding step further comprises the step of encoding each character in a code word having a distance of at least four.

Claim 40

The method of claim 34, wherein said encoding step further includes the step of encoding each data character in a fourteen-bit code word, and wherein said decoding step further includes the step of decoding ones of said fourteen-bit data blocks.

Claim 47

The method of claim 39, wherein each of said block has fourteen data bits and wherein said step of listing includes a step of listing each of said fourteen-bit blocks having seven binary ones.

Claim 48

The method of claim 39, wherein said step of listing includes the step of sorting said blocks according to those of said blocks having a distance of at least four from each of said blocks.

Claim 49

The method of claim 39, wherein said step of identifying includes the steps of: selecting one of said blocks; selecting those of said blocks having a distance of four from said selected one of said blocks and each other; when the number of selected blocks having a distance of four is less than a predetermined number, selecting a different one of said blocks; and repeating said step of selecting those of said blocks having a distance of four from said selected different one of said blocks and each other.