US4965692A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Overload detector and protection circuit
Assignee: Siemens Transmission Systems Inc
•
Filing: 1989-07-31
•
Granted: 1990-10-23
•
Expires: 2009-07-31
Abstract
Abstract An overload protection circuit for power supplies and telecommunications apparatus such as multifrequency ringing generators causes the output voltage to become zero when a current overload is detected. The voltage is kept at zero for a predetermined period of time. Then the output voltage is restored. If an overload is still detected, the output voltage is again brought to zero.
Inventors
- 👤 Robert V. Burns
- 👤 Sanjay Gupta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:59
CPC Classifications
H; H04; H04M; H04M19/00; H04M19/02; H02; H02H; H02H3/00; H02H3/08; H02H3/087; H03; H03F; H03F1/00; H03F1/52; H03F2200/00; H03F2200/426
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
251 words
A power unit having overload protection, comprising: an input section for providing a digital power input signal representing a power output to be supplied to a load; an AND gate having one input to which said digital power input signal is applied, another input to which a digital power enable signal is applied, and an output for providing a digital power output signal when both said digital power input signal and said digital power enable signal are applied at a "high" logic level; a power amplifier stage for providing a power output to a load in response to said digital power output signal from said AND gate; sensing means for sensing a current level corresponding to the power output of said power amplifier stage, and for producing a current level voltage based thereon; a comparator for comparing said current level voltage with a reference voltage representing a predetermined safe current level, and for producing an output indicative of when the current level of the power output exceeds the predetermined safe current level; digital timing-out means having an input coupled to the output of said comparator, and having an output for normally providing the digital power enable signal at a "high" logic level to said AND gate and for providing the digital power enable signal at a "low" logic level to said AND gate for a predetermined period of time when the output of said comparator indicates that the current level of the power output has exceeded the predetermined safe current level.
Claim 2
Dependent Claim
251 words
A power unit having overload protection, comprising: an input section for providing a digital power input signal representing a power output to be supplied to a load; an AND gate having one input to which said digital power input signal is applied, another input to which a digital power enable signal is applied, and an output for providing a digital power output signal when both said digital power input signal and said digital power enable signal are applied at a "high" logic level; a power amplifier stage for providing a power output to a load in response to said digital power output signal from said AND gate; sensing means for sensing a current level corresponding to the power output of said power amplifier stage, and for producing a current level voltage based thereon; a comparator for comparing said current level voltage with a reference voltage representing a predetermined safe current level, and for producing an output indicative of when the current level of the power output exceeds the predetermined safe current level; digital timing-out means having an input coupled to the output of said comparator, and having an output for normally providing the digital power enable signal at a "high" logic level to said AND gate and for providing the digital power enable signal at a "low" logic level to said AND gate for a predetermined period of time when the output of said comparator indicates that the current level of the power output has exceeded the predetermined safe current level.
Claim 3
Dependent Claim
70 words
A power unit according to claim 1, which is a ringing signal generator, wherein said input section includes a pulse width modulation (PWM) generator for providing digital pulse width modulated signals representing a ringing signal output to be supplied to the load, and said power amplifier stage includes a driver and a transformer for converting the digital pulse width modulated signals passed by said AND gate to a ringing signal.
Claim 4
Dependent Claim
45 words
A power unit according to claim 1, wherein said digital timing-out means is a one-shot multivibrator having an input clock to control its timing to set the predetermined period of time during which said digital power enable signal is shut-down at the "low" logic level.
Claim 5
Independent Claim
199 words
A method of protecting a power unit from an overload condition, comprising the steps of: providing a digital power input signal representing a power output to be supplied to a load; gating said digital power input signal through an AND gate with a digital power enable signal, and providing an output of a digital power output signal when both said digital power input signal and said digital power enable signal are at a "high" logic level; amplifying the digital power output signal from the AND gate as a power output to a load; sensing a current level corresponding to the power output and producing a current level voltage based thereon; comparing the current level voltage with a reference voltage representing a predetermined safe current level, and producing an output indicative of when the current level of the power output exceeds the predetermined safe current level; and normally providing the digital power enable signal at a "high" logic level to the AND gate, and providing the digital power enable signal at a "low" logic level to the AND gate for a predetermined period of time when the current level of the power output has exceeded the predetermined safe current level.
Claim 6
Independent Claim
199 words
A method of protecting a power unit from an overload condition, comprising the steps of: providing a digital power input signal representing a power output to be supplied to a load; gating said digital power input signal through an AND gate with a digital power enable signal, and providing an output of a digital power output signal when both said digital power input signal and said digital power enable signal are at a "high" logic level; amplifying the digital power output signal from the AND gate as a power output to a load; sensing a current level corresponding to the power output and producing a current level voltage based thereon; comparing the current level voltage with a reference voltage representing a predetermined safe current level, and producing an output indicative of when the current level of the power output exceeds the predetermined safe current level; and normally providing the digital power enable signal at a "high" logic level to the AND gate, and providing the digital power enable signal at a "low" logic level to the AND gate for a predetermined period of time when the current level of the power output has exceeded the predetermined safe current level.
Claim 7
Dependent Claim
20 words
A method of protecting a power unit according to claim 4, wherein the overload condition is a short circuit condition.
References Cited (Backward Citations)
US4288831A
Cited
US4254305A
Cited
US4476427A
Cited
US4438473A
Cited
US4656659A
Cited
US4878034A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-10-22 | 1994-04-23 | 1994-10-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-10-22 | 1998-04-23 | 1998-10-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-10-22 | 2002-04-23 | 2002-10-23 | $7700.00 | Window Closed / Lapsed |