Composite ringing and coin control voltage detector and method

Claim 2

A composite detection circuit for use in the loop testing of a telephone system for detecting ringing voltages and coin control voltages on a telephone line, said circuit comprising: an input terminal for connection to a telephone line for receiving an input voltage therefrom; means connected to said input terminal for conditioning said input voltage, said conditioning means having an output for providing a conditioned voltage; means for separating said conditioned voltage into positive and negative portions, said separating means having an input connected to said output of said conditioning means and positive and negative outputs for providing positive and negative portions of said conditioned voltage; and means for detecting when said positive and negative portions of said conditioned voltages exceed predetermined thresholds and for providing output voltages indicative thereof, whereby a voltage indicative of a positive voltage corresponds to a detected positive ringing or coin control voltage and a voltage indicative of a negative voltage corresponds to a detected negative ringing or coin control voltage, said detecting means having inputs connected to the outputs of said polarity separating means and first and second outputs for providing said indicative voltages.

Claim 3

A circuit as described in claim 1, wherein the input terminal is connected to a tip line of a telephone line pair for detecting ±ringing voltages and ±coin control voltages, said circuit further comprises: a second input terminal for connection to a ring line of a telephone line pair for receiving an input voltage therefrom; a second conditioning means connected to said second input terminal for conditioning said input voltage, said second conditioning means having an output for providing a second conditioned voltage; a second separating means for separating said second conditioned voltage into positive and negative portions, said second separating means having an input connected to said output of said second conditioning means and positive and negative outputs for providing positive and negative portions of said second conditioned voltage; and means for detecting when said positive and negative portions of said conditioned voltage exceed predetermined thresholds and for providing output voltages indicative thereof, whereby a voltage indicative of a positive voltage corresponds to a detected positive ringing voltage and a voltage indicative of a negative voltage corresponds to a detected negative ringing voltage, said second detecting means having inputs connected to said outputs of said second separating means and first and second outputs for providing said indicative voltages.

Claim 4

A circuit as described in claim 1, wherein said conditioning means comprises a frequency selective amplifying means for selectively amplifying said input voltages in accordance with the frequency.

Claim 5

A circuit as described in claim 3, wherein said selective amplifying means comprises: an operational amplifier having non-inverting and inverting inputs and an output; and a frequency selective feedback means connected between said amplifier inverting input and said amplifier output, said non-inverting input being connected to said input terminal.

Claim 6

A circuit as described in claim 4, wherein said frequency selective feedback means comprises a capacitor connected between said amplifier inverting input and said amplifier output, a first resistor connected between said amplifier inverting input and said amplifier output, and a second resistor connected between amplifier inverting input and ground.

Claim 7

A circuit as described in claim 5, wherein said conditioning means further comprises a means for attenuating said input voltages.

Claim 8

A circuit as described in claim 6, wherein said attenuating means comprises a first resistor connected between said input terminal and said amplifier non-inverting input, and a second resistor connected between said amplifier non-inverting input and ground.

Claim 9

A circuit as described in claim 7, wherein said conditioning means further comprises means for providing overvoltage protection to said amplifier.

Claim 10

A circuit as described in claim 8, wherein said overvoltage protection means comprises first and second diodes, the cathode of said first diode being connected to a positive power supply and the anode of said first diode being connected to said amplifier non-inverting input, and the anode of said second diode being connected to negative power supply and the cathode of said second diode being connected to said amplifier non-inverting input.

Claim 11

A circuit as described in claim 9, wherein said separation means comprises positive and negative diodes, the anode of said positive diode being connected to said amplifier output and the cathode of said positive diode providing said positive output and the cathode of said second diode being connected to said amplifier output and the anode of said negative diode providing said negative output.

Claim 12

A circuit as described in claim 10, wherein said threshold detection means comprises positive and negative threshold detectors connected to said positive and negative outputs of said separating means.

Claim 13

A circuit as described in claim 11, wherein said positive and negative threshold detectors each comprise an operational amplifier, a first resistor being connected between a power supply and an input of said amplifier, and a second resistor being connected between ground and the same input of said amplifier.

Claim 14

A circuit as described in claim 12, wherein said detection circuit further comprises means for translating the level of said first and second outputs of said threshold detecting means to digital outputs, said level translating means having first and second inputs connected to said threshold detecting means first and second outputs and first and second outputs for providing digital indications of said detections.

Claim 15

A circuit as described in claim 13, wherein said level translating means comprises first and second inverters being connected to said first and second outputs of said first and second threshold detecting means.

Claim 16

A circuit as described in claim 1, wherein said separating means comprises positive and negative diodes, the anode of said positive diode being connected to said amplifier output and the cathode of said positive diode providing said positive output and the cathode of said second diode being connected to said amplifier output and the anode of said negative diode providing said negative output.

Claim 17

A circuit as described in claim 15, wherein said threshold detection means comprises positive and negative threshold detectors connected to said positive and negative outputs of said polarity separating means.

Claim 18

A circuit as described in claim 16, wherein said positive and negative threshold detectors each comprise an operational amplifier, a first resistor being connected between a power supply and an input of said amplifier, and a second resistor being connected between ground and the same input of said amplifier.

Claim 19

A circuit as described in claim 17, wherein said detection circuit further comprises means for translating the level of said first and second outputs of said threshold detecting means to digital outputs, said level translating means having first and second inputs connected to said threshold detecting means first and second outputs and first and second outputs for providing digital indications of said detections.

Claim 20

A circuit as described in claim 18, wherein said level translating means comprises first and second inverters being connected to said first and second outputs of said first and second threshold detecting means.

Claim 21

A circuit as described in claim 1, wherein said threshold detection means comprises positive and negative threshold detectors connected to said positive and negative outputs of said polarity separating means.

Claim 22

A circuit as described in claim 20, wherein said positive and negative threshold detectors each comprise an operational amplifier, a first resistor being connected between a power supply and an input of said amplifier, and a second resistor being connected between ground and the same input of said amplifier.

Claim 23

A circuit as described in claim 21, wherein said detection circuit further comprises means for translating the level of said first and second outputs of said threshold detecting means to digital outputs, said level translating means having first and second inputs connected to said threshold detecting means first and second outputs and first and second outputs for providing digital indications of said detections.

Claim 24

A circuit as described in claim 22, wherein said level translating means comprises first and second inverters being connected to said first and second outputs of said first and second threshold detecting means.

Claim 27

A method as described in claim 24, wherein said conditioning step further comprises selectively amplifying said input signal.

Claim 28

A method as described in claim 25, wherein said input signal includes AC and DC components and said step of selectively amplifying selectively amplifies the DC components over the AC components, whereby DC coin control voltages can be detected at a higher threshold that is not tripped by ringing voltage levels.

Claim 29

A method as described in claim 26, wherein said conditioning step further comprises attenuating said input signal.

Claim 30

A method as described in claim 27, wherein said method of composite detection further comprises a translating step for translating the level of said indicative outputs to digital outputs.

Claim 31

A method as described in claim 24, wherein said conditioning step further comprises attenuating said input signal.

Claim 32

A method as described in claim 29, wherein said method of detection further comprises a translating step for translating the level of said indicative outputs to digital outputs.

Claim 33

A method as described in claim 24, wherein said method of detection further comprises a translating step for translating the level of said indicative outputs to digital outputs.