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US4961009A Expired / Lapsed US ⏱️ 0.0 years remaining

Current-voltage converting circuit utilizing CMOS-type transistor

Assignee: MagnaChip Semiconductor Ltd
•
Filing: 1989-06-20
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Granted: 1990-10-02
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Expires: 2009-06-20
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Abstract

Abstract A current-voltage converting circuit applicable to a linear integrated circuit of CMOS-type having a wide-ranged operational voltage, comprising a buffer circuit for buffering and amplifying a current being input to an input terminal; a gain circuit for outputting a voltage in proportion to the output voltage of the buffer circuit; and a current reference circuit constituted in a current mirror by P-channel transistors; N-channel transistors and a reference voltage and is adapted to supply a constant voltage to gates of P-channel transistors provided in the gain circuit.

Inventors

  • 👤 Woo H. Baik

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 18:40
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G05F3/247; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/561

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 177 words
A current-voltage converting circuit utilizing a CMOS-type transistor, which comprises: a buffer circuit (11) which is composed of resistors (R 1 , R 2 ) and N-channel transistors (N 1 ,N 2 ,N 5 ) and buffers and amplifies a current being input to an input terminal (I in ); a gain circuit (12) which is constituted in a 2-step inverter form so as to have a current source load by P-channel transistors (P 1 ,P 2 ) and N-channel transistors (N 3 ,N 4 ) and outputs a voltage in proportion to the output voltage of said buffer circuit (11) and feedbacks the output voltage to gates of N-channel transistors (N 2 ,N 5 ) of said buffer circuit (11); and a current reference circuit (13) which is constituted in a current mirror by P-channel transistors (P 3 ,P 4 ), N-channel transistors (N 6 ,N 7 ) and a reference voltage (V ref ) and supplies a constant voltage to gates of the P-channel transistors (P 1 ,P 2 ) of the gain circuit (12).
Claim 2
Dependent Claim 177 words
A current-voltage converting circuit utilizing a CMOS-type transistor, which comprises: a buffer circuit (11) which is composed of resistors (R 1 , R 2 ) and N-channel transistors (N 1 ,N 2 ,N 5 ) and buffers and amplifies a current being input to an input terminal (I in ); a gain circuit (12) which is constituted in a 2-step inverter form so as to have a current source load by P-channel transistors (P 1 ,P 2 ) and N-channel transistors (N 3 ,N 4 ) and outputs a voltage in proportion to the output voltage of said buffer circuit (11) and feedbacks the output voltage to gates of N-channel transistors (N 2 ,N 5 ) of said buffer circuit (11); and a current reference circuit (13) which is constituted in a current mirror by P-channel transistors (P 3 ,P 4 ), N-channel transistors (N 6 ,N 7 ) and a reference voltage (V ref ) and supplies a constant voltage to gates of the P-channel transistors (P 1 ,P 2 ) of the gain circuit (12).

References Cited (Backward Citations)

US4453094A Cited
US4700125A Cited
US4766415A Cited
US4745395A Cited
US4800339A Cited
US4818901A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-10-01 1994-04-02 1994-10-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-10-01 1998-04-02 1998-10-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-10-01 2002-04-02 2002-10-02 $7700.00 Window Closed / Lapsed

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