Data processing system with model for status accumulating operation by simulating sequence of arithmetic steps performed by arithmetic processor

Claim 1

A method for accumulating a status of execution of an arithmetic operation that comprises a sequence of steps, by an arithmetic processor having hardware elements for performing said sequence of steps, where said step is performed on one or more operands that have status values and produces an intermediate or final arithmetic result and can produce a corresponding status indicator, said method comprising simulating said hardware elements in a model that performs simulated steps on said status values analogous to the sequence of steps performed by said hardware elements on said operands that have said status values, said simulated steps including an accumulation operation on the status values of said operands; and while said hardware elements are performing each one of said sequence of steps of said arithmetic operation, performing said analogous simulated steps on said status values so that, for each intermediate or final arithmetic result produced by one of said hardware elements, said model produces a corresponding intermediate or final status result at a point in said model that corresponds to said hardware element, said intermediate or final status result being a function of the status values of the one or more operands operated on to produce said corresponding intermediate or final arithmetic result, said performing of said analogous simulated steps including (a) applying each said status indicator to said point in said model that corresponds to the hardware element that performs said arithmetic operation step, and (b) accumulating at each said point in said model said status indicator with said status values of the one or more operands operated on by said hardware element in performing said arithmetic operation step, (c) whereby the intermediate or final status results each represent an accumulation of the status of the steps of the arithmetic operation that are performed to produce the corresponding intermediate or final arithmetic result and represent the status values of the operands on which said steps are performed, and whereby the final status result produced by said model will represent the accumulated status of the execution of the arithmetic operation.

Claim 2

A method for accumulating a status of execution of an arithmetic operation that comprises a sequence of steps, by an arithmetic processor having hardware elements for performing said sequence of steps, where said step is performed on one or more operands that have status values and produces an intermediate or final arithmetic result and can produce a corresponding status indicator, said method comprising simulating said hardware elements in a model that performs simulated steps on said status values analogous to the sequence of steps performed by said hardware elements on said operands that have said status values, said simulated steps including an accumulation operation on the status values of said operands; and while said hardware elements are performing each one of said sequence of steps of said arithmetic operation, performing said analogous simulated steps on said status values so that, for each intermediate or final arithmetic result produced by one of said hardware elements, said model produces a corresponding intermediate or final status result at a point in said model that corresponds to said hardware element, said intermediate or final status result being a function of the status values of the one or more operands operated on to produce said corresponding intermediate or final arithmetic result, said performing of said analogous simulated steps including (a) applying each said status indicator to said point in said model that corresponds to the hardware element that performs said arithmetic operation step, and (b) accumulating at each said point in said model said status indicator with said status values of the one or more operands operated on by said hardware element in performing said arithmetic operation step, (c) whereby the intermediate or final status results each represent an accumulation of the status of the steps of the arithmetic operation that are performed to produce the corresponding intermediate or final arithmetic result and represent the status values of the operands on which said steps are performed, and whereby the final status result produced by said model will represent the accumulated status of the execution of the arithmetic operation.

Claim 8

A system for accumulating a status of execution of an arithmetic operation that comprises a sequence of steps, comprising an arithmetic processor having hardware elements for performing said sequence of steps, each said step being performed on one or more operands that have status values and producing an intermediate or final arithmetic result and is capable of producing a corresponding status indicator, means for simulating said hardware elements in a model that performs simulated steps on said status values analogous to the sequence of steps performed by said hardware elements on said operands that have said status values, said simulated steps including an accumulation operation on the status values of said one or more operands; and means for controlling the operation of said model so that, while said hardware elements are performing each one of said sequence of steps of said arithmetic operation, said model performs said analogous simulated steps on said status values so that, for each intermediate or final arithmetic result produced by one of said hardware elements, said model produces a corresponding intermediate or final arithmetic result produced by one of said hardware elements, said model produces a corresponding intermediate or final status result at a point in said model that corresponds to said hardware element, said intermediate or final status result being a function of the status values of the one or more operands operated on to produce said corresponding intermediate or final arithmetic result, said means for controlling causing said arithmetic processor to apply each said status indicator to said point in said model that corresponds to the hardware element that performs said arithmetic operation step, and said model including means for accumulating at each said point in said model said status indicator with said status values of the one or more operands operated on by said hardware element in performing said arithmetic operation step, whereby the intermediate or final status results each represent an accumulation of the status of the steps of the arithmetic operation that are performed to produce the corresponding intermediate or final arithmetic result and represent the status values of the operands on which said steps are performed, and whereby the final status result produced by said model will represent the accumulated status of the execution of the arithmetic operation.

Claim 9

A system for accumulating a status of execution of an arithmetic operation that comprises a sequence of steps, comprising an arithmetic processor having hardware elements for performing said sequence of steps, each said step being performed on one or more operands that have status values and producing an intermediate or final arithmetic result and is capable of producing a corresponding status indicator, means for simulating said hardware elements in a model that performs simulated steps on said status values analogous to the sequence of steps performed by said hardware elements on said operands that have said status values, said simulated steps including an accumulation operation on the status values of said one or more operands; and means for controlling the operation of said model so that, while said hardware elements are performing each one of said sequence of steps of said arithmetic operation, said model performs said analogous simulated steps on said status values so that, for each intermediate or final arithmetic result produced by one of said hardware elements, said model produces a corresponding intermediate or final arithmetic result produced by one of said hardware elements, said model produces a corresponding intermediate or final status result at a point in said model that corresponds to said hardware element, said intermediate or final status result being a function of the status values of the one or more operands operated on to produce said corresponding intermediate or final arithmetic result, said means for controlling causing said arithmetic processor to apply each said status indicator to said point in said model that corresponds to the hardware element that performs said arithmetic operation step, and said model including means for accumulating at each said point in said model said status indicator with said status values of the one or more operands operated on by said hardware element in performing said arithmetic operation step, whereby the intermediate or final status results each represent an accumulation of the status of the steps of the arithmetic operation that are performed to produce the corresponding intermediate or final arithmetic result and represent the status values of the operands on which said steps are performed, and whereby the final status result produced by said model will represent the accumulated status of the execution of the arithmetic operation.