US4956568A
Expired / Lapsed
US
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Monolithic sampler
Assignee: Agilent Technologies Inc
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Filing: 1988-12-08
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Granted: 1990-09-11
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Expires: 2008-12-08
Abstract
Abstract A Monolithic Sampler is disclosed. The present invention overcomes the problem of inadequately low sampling rates that results from circuit designs or component limitations that constrain the bandwidths of previous instruments. The sampler includes five circuit stages: a local oscillator section that may be used to drive the system, a shock wave generator that produces high frequency edge-sharpened pulses, a reflection damping clamping section, a delay section, and a sampler section regulated by the stream of shock waves which produces an IF output. The local oscillator or a pulse generator (not shown) produces an input that propagates down a nonlinear transmission line. Once this input reaches the shock wave generator section, it encounters a series of hyperabrupt diodes which are employed as voltage dependent capacitors called varactors. These varactors deform the input pulses and generate a stream of spike-shaped waveforms known as shock waves. The shock waves successively energize sampling diodes in the sampling section of the circuit. When these diodes are energized, they open pathways from an RF input to sampling capacitors which charge up with small representative bits of current from the input. A sample or snapshot of the input is drawn from these capacitors through an IF output coupling network. The clamping and delay sections of the sampler minimize spurious ringing throughout the circuit and manage the timing of the oscillation of these reflections. The entire sampler is monolithically integrated on a single substrate using conventional semiconductor fabrication and packaging techniques.
Inventors
- 👤 Chung-Yi Su
- 👤 Michael R. Ty Tan
- 👤 William J. Anklam
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 12:16
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/02; G11C27/024
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
101 words
A sampler circuit comprising: a means for providing a signal from a local oscillator; a means for generating shock waves coupled to said means for providing a local oscillator signal; said means for generating shock waves including a nonlinear transmission line spanned by a plurality of varactors; and a means for sampling an input signal coupled to said means for generating shock waves, said means for sampling including: a pair of sampling capacitors coupled to a pair of sampling diodes and an IF output network that includes a positive terminal and a grounded terminal which together produce an IF sampled output.
Claim 2
Dependent Claim
101 words
A sampler circuit comprising: a means for providing a signal from a local oscillator; a means for generating shock waves coupled to said means for providing a local oscillator signal; said means for generating shock waves including a nonlinear transmission line spanned by a plurality of varactors; and a means for sampling an input signal coupled to said means for generating shock waves, said means for sampling including: a pair of sampling capacitors coupled to a pair of sampling diodes and an IF output network that includes a positive terminal and a grounded terminal which together produce an IF sampled output.
Claim 3
Dependent Claim
26 words
A sampler circuit as in claim 1, further comprising: a clamping means coupled to said means for generating shock waves; said clamping means including a varactor.
Claim 4
Dependent Claim
21 words
A sampler circuit as in claim 2 further comprising: a means for inserting a signal delay coupled to said clamping means.
Claim 5
Dependent Claim
21 words
A sampler circuit as in claim 1 wherein the varactors in said means for generating shock waves are each hyperabrupt varactors.
Claim 6
Dependent Claim
15 words
A sampler circuit as in claim 1 wherein the hyperabrupt varactors are Schottky hyperabrupt diodes.
Claim 7
Dependent Claim
19 words
A sampler as claimed in claim 2, in which said nonlinear shock wave generator section varactors are hyperabrupt varactors.
Claim 8
Dependent Claim
18 words
A sampler as claimed in claim 2 which includes a pulse generator in place of said local oscillator.
Claim 9
Dependent Claim
417 words
A sampler circuit comprising: a local oscillator stage including a source resistor in series with a balanced transformer and a local oscillator; a shock wave generator stage coupled to said local oscillator stage, said shock wave generator stage including: a two-conductor, balanced, edge-sharpening, nonlinear transmission line spanned by a plurality of uniformly distributed nonlinear shock wave generator section varactors which are spaced apart on said transmission line at a preselected distance and which are each connected to said transmission line in the same polarity; a clamping diode stage coupled to said shock wave generator stage, said clamping diode stage including: a transmission line spanned by a clamping diode stage nonlinear varactor coupled in the same polarity as said shock wave generator section varactors; said clamping diode stage nonlinear varactor further having a smaller zero-bias capacitance and a larger series resistance than said shock wave generator stage varactors; a delay stage coupled to said clamping diode stage, said delay stage including: an unloaded transmission line having a predetermined impedance designed to damp a reflected signal propagating toward said local oscillator stage along said unloaded transmission line; and a sampling stage coupled to said delay stage, said sampling stage including: a transmission line including a first group of nodes [a], [b], [d], and [e]; said transmission line terminating in a resistive short; a pair of RF input termination resistors connected in series between said nodes [a] and [b] and defining a node [c] between them; a first sampling capacitor, a first sampling diode, a second sampling diode aligned in the same polarity as said first sampling diode, and a second sampling capacitor connected in series between said nodes [d] and [e] and defining a second group of nodes [f], [g], and [h] between them; a pair of RF input terminals [i] and [j], said terminal [i] being connected to said node [g] between said first and second sampling diodes, said terminal [j] being grounded; an IF output coupling network coupled within said sampling diode stage at nodes [f] and [h]; said IF coupling network including, in series: a first IF output coupling resistor connected to said node [f], a node [k], a first IF output coupling capacitor, an IF terminal [l], a second IF coupling capacitor, a node [m], a second IF output coupling resistor connected to said node [h]; and said IF output network further including a third IF output coupling resistor and a grounded terminal [n], which, together with said terminal [l], produces an IF sampled output.
Claim 10
Dependent Claim
417 words
A sampler circuit comprising: a local oscillator stage including a source resistor in series with a balanced transformer and a local oscillator; a shock wave generator stage coupled to said local oscillator stage, said shock wave generator stage including: a two-conductor, balanced, edge-sharpening, nonlinear transmission line spanned by a plurality of uniformly distributed nonlinear shock wave generator section varactors which are spaced apart on said transmission line at a preselected distance and which are each connected to said transmission line in the same polarity; a clamping diode stage coupled to said shock wave generator stage, said clamping diode stage including: a transmission line spanned by a clamping diode stage nonlinear varactor coupled in the same polarity as said shock wave generator section varactors; said clamping diode stage nonlinear varactor further having a smaller zero-bias capacitance and a larger series resistance than said shock wave generator stage varactors; a delay stage coupled to said clamping diode stage, said delay stage including: an unloaded transmission line having a predetermined impedance designed to damp a reflected signal propagating toward said local oscillator stage along said unloaded transmission line; and a sampling stage coupled to said delay stage, said sampling stage including: a transmission line including a first group of nodes [a], [b], [d], and [e]; said transmission line terminating in a resistive short; a pair of RF input termination resistors connected in series between said nodes [a] and [b] and defining a node [c] between them; a first sampling capacitor, a first sampling diode, a second sampling diode aligned in the same polarity as said first sampling diode, and a second sampling capacitor connected in series between said nodes [d] and [e] and defining a second group of nodes [f], [g], and [h] between them; a pair of RF input terminals [i] and [j], said terminal [i] being connected to said node [g] between said first and second sampling diodes, said terminal [j] being grounded; an IF output coupling network coupled within said sampling diode stage at nodes [f] and [h]; said IF coupling network including, in series: a first IF output coupling resistor connected to said node [f], a node [k], a first IF output coupling capacitor, an IF terminal [l], a second IF coupling capacitor, a node [m], a second IF output coupling resistor connected to said node [h]; and said IF output network further including a third IF output coupling resistor and a grounded terminal [n], which, together with said terminal [l], produces an IF sampled output.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-09-10 | 1994-03-12 | 1994-09-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-09-10 | 1998-03-12 | 1998-09-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-09-10 | 2002-03-12 | 2002-09-11 | $7700.00 | Window Closed / Lapsed |