Patent US4954942A successfully refreshed from Google Patents.
US4954942A
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US
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Software debugging system for writing a logical address conversion data into a trace memory of an emulator
Assignee: Hitachi Ltd
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Filing: 1988-11-17
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Granted: 1990-09-04
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Expires: 2008-11-17
Abstract
Abstract The microprocessor has an address converting buffer to convert logical addresses into physical addresses and a signal generator representing the timing for the microprocessor to retrieve conversion information from an external memory and write it into the address converting buffer. With this configuration, it is possible to determine the logical address from the physical address that was output to an external circuit, without the microprocessor outputting the logical address directly to the external circuit.
Inventors
- 👤 Satoshi Masuda
- 👤 Ikuya Kawasaki
- 👤 Shigezumi Matsui
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:54
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/362; G06F11/3636; G06F11/22; G06F11/26; G06F11/261; G06F11/30; G06F11/34; G06F11/3466; G06F11/3471; G06F11/348; G06F11/3648; G06F12/00; G06F12/02; G06F12/08; G06F12/10
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
201 words
A data processing system for debugging software, the system comprising: a main memory for receiving logical and physical address data; a data bus; a data processor in communication with the main memory through the data bus, said data processor including: (i) a memory management unit for converting logical address data to physical address data, (ii) a means for generating an indication signal representing an access of the main memory by the data processor wherein, said indication signal is generated upon detection that selected logical address data is absent from the memory management unit; and an emulator in communication with an address bus, said emulator including: (i) a means for storing address conversion information from the data bus, (ii) a means for converting physical address data to logical address data; and an electrode means for directly transmitting the indication signal from the memory management unit of the data processor to the emulator, the indication signal enabling the emulator to access the physical address data from the address bus and permitting the storage of newly generated address conversion information in the address conversion information storing means for conversion of physical address data to logical address data by the converting means of the emulator.
Claim 2
Dependent Claim
201 words
A data processing system for debugging software, the system comprising: a main memory for receiving logical and physical address data; a data bus; a data processor in communication with the main memory through the data bus, said data processor including: (i) a memory management unit for converting logical address data to physical address data, (ii) a means for generating an indication signal representing an access of the main memory by the data processor wherein, said indication signal is generated upon detection that selected logical address data is absent from the memory management unit; and an emulator in communication with an address bus, said emulator including: (i) a means for storing address conversion information from the data bus, (ii) a means for converting physical address data to logical address data; and an electrode means for directly transmitting the indication signal from the memory management unit of the data processor to the emulator, the indication signal enabling the emulator to access the physical address data from the address bus and permitting the storage of newly generated address conversion information in the address conversion information storing means for conversion of physical address data to logical address data by the converting means of the emulator.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-09-03 | 1994-03-05 | 1994-09-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-09-03 | 1998-03-05 | 1998-09-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-09-03 | 2002-03-05 | 2002-09-04 | $7700.00 | Window Closed / Lapsed |