Diagnostic system for personal computer

Claim 1

In a microcomputer system including housing means a main memory unit carried in said microcomputer housing means for storing data and program instructions, a secondary memory unit carried in said microcomputer housing means for storing data and program instructions to be selectively accessed into said main memory unit, a central processing unit including a control unit for interpreting and executing instructions obtained from said main memory unit, and, a logic unit for performing arithmetic and comparative operations, a least one peripheral unit exterior of said housing means, and a bus leading from said peripheral unit to said central processing unit, the improvements in said microcomputer system which enable testing of said peripheral unit for faults therein, said improvements comprising, in combination with said microcomputer system, (a) program means in said secondary memory unit for, when said program means is accessed into said main memory and executed, causing said control unit to direct a diagnostic test signal over said bus to said peripheral unit; (b) sensor means carried by said microcomputer housing means intermediate said peripheral unit and said control unit for identifying said diagnostic test signal in said bus line between said peripheral unit and said control unit and for identifying any peripheral unit test signals directed from said peripheral unit through said bus in response to said diagnostic test signal; (c) means for storing said diagnostic and peripheral unit test signal information; and, (d) means for recalling said stored diagnostic and peripheral unit signal information; and, (e) means for comparing said recalled diagnostic and peripheral, unit signal information with priorly derived predicted test signal information for said diagnostic signal and for generating fault evaluation signals.

Claim 4

A method for testing a microcomputer, said microcomputer including housing means, a main memory unit carried in said microcomputer housing means for storing data and program instructions, a secondary memory unit carried in said microcomputer housing means for receiving and storing data and program instructions to be transmitted to said main memory unit, a central processing unit including a control unit for interpreting and executing instructions obtained from said main memory unit, and, a logic unit for performing arithmetic and comparative operations, a least one peripheral unit exterior of said housing means, and a bus for carrying signal between said control unit and said peripheral unit and including a first portion leading from said peripheral unit to a connector mounted in said housing, and a second portion leading from said connector to said central processing unit, said method comprising the steps of: (a) disconnecting said second portion of said bus from said connector; (b) attaching signal identification sensor means to said connector to sense signals in said bus between said control unit and peripheral unit and including (i) a secondary connector to receive said disconnected second portion of said bus, (ii) means for sensing signals in said bus, (c) connecting diagnostic circuitry to said sensing means to receive and store signals identified by said sensing means; (d) loading a diagnostic program in said secondary memory, said program including a diagnostic test sub-routine to generate at least one test signal over said bus between said peripheral unit and said control unit; (e) accessing said diagnostic program from said secondary memory into said main memory; (f) applying a diagnostic test sub-routine address to said main memory where said address represents the address of said diagnostic test sub-routine associated with the testing of said peripheral unit; (g) executing said diagnostic test sub-routine in response to the receipt of said address to generate a test signal in said bus between said peripheral unit and said control unit; (h) storing in said diagnostic circuitry signals detected by said sensing means in said bus during said diagnostic test sub-routine; and, (i) comparing said stored signals from said diagnostic test sub-routine with priorly derived predicted test data for said diagnostic test sub-routine.

Claim 5

A method for testing a microcomputer, said microcomputer including housing means, a main memory unit carried in said microcomputer housing means for storing data and program instructions, a secondary memory unit carried in said microcomputer housing means for receiving and storing data and program instructions to be transmitted to said main memory unit, a central processing unit including a control unit for interpreting and executing instructions obtained from said main memory unit, and, a logic unit for performing arithmetic and comparative operations, a least one peripheral unit exterior of said housing means, and a bus for carrying signal between said control unit and said peripheral unit and including a first portion leading from said peripheral unit to a connector mounted in said housing, and a second portion leading from said connector to said central processing unit, said method comprising the steps of: (a) disconnecting said second portion of said bus from said connector; (b) attaching signal identification sensor means to said connector to sense signals in said bus between said control unit and peripheral unit and including (i) a secondary connector to receive said disconnected second portion of said bus, (ii) means for sensing signals in said bus, (c) connecting diagnostic circuitry to said sensing means to receive and store signals identified by said sensing means; (d) loading a diagnostic program in said secondary memory, said program including a diagnostic test sub-routine to generate at least one test signal over said bus between said peripheral unit and said control unit; (e) accessing said diagnostic program from said secondary memory into said main memory; (f) applying a diagnostic test sub-routine address to said main memory where said address represents the address of said diagnostic test sub-routine associated with the testing of said peripheral unit; (g) executing said diagnostic test sub-routine in response to the receipt of said address to generate a test signal in said bus between said peripheral unit and said control unit; (h) storing in said diagnostic circuitry signals detected by said sensing means in said bus during said diagnostic test sub-routine; and, (i) comparing said stored signals from said diagnostic test sub-routine with priorly derived predicted test data for said diagnostic test sub-routine.