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US4951121A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device with a 3-ply gate electrode

Assignee: Toshiba Corp
•
Filing: 1989-12-28
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Granted: 1990-08-21
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Expires: 2009-12-28
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Abstract

Abstract A semiconductor device comprising a compound semiconductor substrate whose surface is provided with a source region, a drain region and an interventing channel region; a source electrode formed on said source region; a drain electrode mounted on said drain region; and a 3-ply gate electrode formed on said channel region and consisting of a high melting metal layer, a barrier metal layer and a gold layer in that order.

Inventors

  • 👤 Motoki Furukawa
  • 👤 Yoshihiro Kishita
  • 👤 Tatsuro Mitani

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 06:36
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/0616; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6738; H10D30/674; H10D30/675; H10D64/00; H10D64/60; H10D64/64; H10D62/00; H10D62/80; H10D62/85

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 80 words
A semiconductor device comprising: a compound semiconductor substrate whose surface is provided with a source region, a drain region and an intervening channel region; a source electrode formed on said source region; a drain electrode formed on said drain region; and a 3-ply gate electrode mounted on said channel region and consisting of a high melting metal layer, a barrier metal layer and a gold layer, respectively, said high melting metal layer being TiW, and said barrier metal being Mo.
Claim 2
Dependent Claim 80 words
A semiconductor device comprising: a compound semiconductor substrate whose surface is provided with a source region, a drain region and an intervening channel region; a source electrode formed on said source region; a drain electrode formed on said drain region; and a 3-ply gate electrode mounted on said channel region and consisting of a high melting metal layer, a barrier metal layer and a gold layer, respectively, said high melting metal layer being TiW, and said barrier metal being Mo.
Claim 3
Dependent Claim 15 words
The semiconductor device according to claim 1, wherein said compound substrate is prepared from GaAs.
Claim 4
Dependent Claim 20 words
The semiconductor device according to claim 1, wherein said high melting metal forms a Shottky contact with said compound semiconductor.
Claim 5
Dependent Claim 29 words
The semiconductor device according to claim 1, wherein said channel region is an N type impurity region, and said source and drain regions are N + type impurity regions.
Claim 6
Dependent Claim 19 words
The semiconductor device according to claim 1, wherein said source and drain electrodes are prepared from an Au-Ge alloy.

References Cited (Backward Citations)

JPS5260568A Cited
JPS56100480A Cited
JPS57153475A Cited
EP0081999A2 Cited
EP0106174A2 Cited
US4546540A Cited
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US4650543A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-08-20 1994-02-19 1994-08-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-08-20 1998-02-19 1998-08-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-08-20 2002-02-19 2002-08-21 $7700.00 Window Closed / Lapsed

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