Electric field effect transistor

Abstract

Abstract PURPOSE:To obtain FET with high reliability by a method wherein a gate electrode, a drain electrode and a source electrode to be formed in FET are constituted by a laminate body of a metal layer having a thermal expansion ratio near to that of semiconductor material or an electrically-insulated substance and of a metal layer excellent in electroconductivity. CONSTITUTION:When a gate electrode 10 is formed on the active region of FET formed of GaAs and the like, a Ti layer 2 whose thermal expansion ratio approximate to that of GaAs is used as the 1st metal layer. Next, an Al layer 3 for lowering gare resistance is laminated as the 2nd layer thereon, and further the 3rd layer formed of a Ti layer 4 is connected thereto. In addition, as electrodes 6 and 7 provided on source and drain regions positioned on both sides of the 3rd layer are used the laminates of Au-Ge and Ni which contact with GaAs under low resistance, these electrodes are covered with an insulating film 5, openings are made therein, and Au electrodes 8 and 9 are fitted to the electrodes 6 and 7 respectively. In this way, exfoliation of the electrodes is avoided.

Inventors

• 👤 Hideaki Kozu
• 👤 Masahide Nakajima

Bibliographic Details