Bilateral switching device

Claim 1

A bilateral switching device having a gate region and first and second terminating regions each of which can serve as an anode and a cathode thereof, said switching device, if electrically energized, being capable of conducting, as a primary current flowing therethrough, a load current flowing between said first and second terminating regions which can be established by providing a signal beyond an initial value to said gate with said load current after such establishment having a magnitude substantially independent of such signal over a substantial range of signal values, and which after such establishment can be ended by providing an alternative signal value to said gate, said device comprising: a semiconductor material body of a first conductivity type and a first conductivity, except in selected characteristic regions thereof, and having a first major surface; a plurality of said characteristic regions intersecting said first major surface in a first major surface portion, including first and second characteristic regions, which are spaced apart from one another in said semiconductor material body and so spaced apart in said first major surface portion, said plurality of characteristic regions each being of a second conductivity type and of a second conductivity in selected portions thereof to result in each forming a corresponding characteristic region pn junction with other portions of said semiconductor body material, where a portion of each such junction is on a side of its associated characteristic region that is opposite said first major surface portion; a plurality of selected contact portions in said semiconductor material body each intersecting said first major surface portion, including first and second contact portions, with each of said plurality of contact portions being part of a corresponding one of said plurality of characteristic regions but of a third conductivity greater than said second conductivity of those remaining portions of its corresponding said characteristic region, said first contact portion being in said first characteristic region and said second contact portion being in said second characteristic region; a plurality of selected interior regions in said semiconductor material body each intersecting said first major surface portion, including first and second interior regions, with each of said plurality of interior regions being contained within a corresponding one of said plurality of characteristic regions through being surrounded thereby in said semiconductor material body to form a corresponding interior region pn junction about that interior region also intersecting said first major surface portion and having a portion thereof paralleling said portion of its corresponding said characteristic region pn junction but separated therefrom by a control resistive portion of that characteristic region located therebetween, and with each such interior region being spaced apart from other portions of said semiconductor material body outside its corresponding said characteristic region to result in also being spaced apart from such other portions of said semiconductor material body by a separating space in said first major surface portion which is also in its corresponding said characteristic region, said first interior region being within said first characteristic region and said second interior region being within said second characteristic region, said plurality of interior regions each being of said first conductivity type with said first terminating region including at least portions of said first interior region and said first contact portion and with said second terminating region including at least portions of said second interior region and said second contact region; and said gate region being formed of a conductive material and located across an electrical insulating material from at least a portion of that said separating space occurring in said first selected region, and with conductivities of each control resistive portion, lengths in total of said interior region pn junctions in said first major surface adjacent a said separating space, thicknesses of said control resistive regions and widths of said separating spaces together having values which permit signals at said gate region to establish and end load currents as aforesaid.