Digital-to-analog conversion circuit

Claim 2

A digital-to-analog converting circuit comprising: a plurality of digital/analog converting means including an upper bit digital/analog converter for converting a plurality of upper bits of input digital data to an analog signal, and at least one lower-bit digital/analog converter for converting lower bits of the input signal data to an analog signal; signal synthesizing means for additively synthesizing respective outputs of said upper-bit and lower-bit digital/analog converters in a predetermined synthesizing ratio determined from a number of said upper bits and lower bits; and data converting means, provided at least at one input side of said at least one lower-bit digital/analog converter, for converting the input digital data to multi-bit digital data, and for supplying the multi-bit data to said at least one lower bit digital/analog converter, said multi-bit digital data having fewer bits than said input digital data and corresponding to the plurality of lower bits of input digital data, and said multi-bit digital data comprising components for correcting an error emerging from said upper-bit digital/analog converter.

Claim 3

A digital-to-analog conversion circuit according to claim 1, wherein said at least one lower-bit digital/analog converter includes a first digital/analog converter for converting, to an analog signal, values of a plurality of bits at least comprising bits lower in their position than said plurality of upper bits of said input digital data, and a second digital/analog converter for converting, to an analog signal, values of a plurality of lower bits at least comprising bits lower in their position than those of said first digital/analog converter; said data converting means includes first data converting means for converting the input digital data to multi-bit digital data which corresponds to the plurality of bits converted by said first digital/analog converter and contains components for correcting an error emerging from said upper-bit digital/analog converter, and for supplying the multi-bit digital data to said first digital/analog converter, and second data converting means for converting the input digital data to multi-bit digital data which corresponds to the plurality of bits converted by said second digital/analog converter and contains components for correcting errors emerging from said upper-bit and first digital/analog converts, and said signal synthesizing means is provided for additively synthesizing respective outputs of said upper-bit, first and second digital/analog converters in a predetermined synthesizing ratio corresponding to their corresponding bit positions.

Claim 4

A digital-to-analog conversion circuit according to claim 1, wherein said data converting means includes means for updating output data corresponding to the input data.

Claim 5

A digital-to-analog conversion circuit, comprising: a plurality of digital/analog converting means for converting digital values to a corresponding analog signal, said plurality of digital/analog converting means including an upper-bit digital/analog converter for converting a plurality of upper bits of input digital data to an analog signal, and at least one lower-bit digital/analog converter for converting a plurality of lower bits of the input digital data to an analog signal; signal synthesizing means for additively synthesizing respective outputs of said upper-bit and lower-bit digital/analog converters in a predetermined synthesizing ratio in accordance with the positions of said plurality of upper bits and lower bits; update-enabling data converting means, provided at least one input side of said plurality of digital/analog converting means, for converting the input digital data to multi-bit digital data, and for supplying the multi-bit data to said at least one lower bit digital/analog converter, said multi-bit digital data having fewer bits than said input digital data and corresponding to the plurality of lower bits of input digital data, and said multi-bit digital data containing components for correcting an error emerging from said upper-bit digital/analog converter; data generating means for generating input digital data for calibration; comparing means for comparing an ideal value with data appearing at the output of said signal synthesizing means upon receipt of the data from said data generating means; and data updating means for updating the conversion data of said update-enabling data converting means to be updated based on a result of the comparison made by said comparing means.

Claim 6

A digital-to-analog conversion circuit, comprising: a plurality of digital/analog converting means for converting digital values to a corresponding analog signal, said plurality of digital/analog converting means including an upper-bit digital/analog converter for converting a plurality of upper bits of input digital data to an analog signal, and at least one lower-bit digital/analog converter for converting a plurality of lower bits of the input digital data to an analog signal; signal synthesizing means for additively synthesizing respective outputs of said upper-bit and lower-bit digital/analog converters in a predetermined synthesizing ratio in accordance with the positions of said plurality of upper bits and lower bits; update-enabling data converting means, provided at least one input side of said plurality of digital/analog converting means, for converting the input digital data to multi-bit digital data, and for supplying the multi-bit data to said at least one lower bit digital/analog converter, said multi-bit digital data having fewer bits than said input digital data and corresponding to the plurality of lower bits of input digital data, and said multi-bit digital data containing components for correcting an error emerging from said upper-bit digital/analog converter; data generating means for generating input digital data for calibration; comparing means for comparing an ideal value with data appearing at the output of said signal synthesizing means upon receipt of the data from said data generating means; and data updating means for updating the conversion data of said update-enabling data converting means to be updated based on a result of the comparison made by said comparing means.

Claim 7

A digital-to-analog conversion circuit according to claim 4, wherein said at least one lower-bit digital/analog converter includes a signal, the values of a plurality of bits at least containing bits lower in their position than said plurality of upper bits of said input digital data, and a second digital/analog converter for converting, to an analog signal, the values of a plurality of lower bits at lest containing bits lower in their position than those of said first digital/analog converter; and said signal synthesizing means is provided for additively synthesizing respective outputs of said upper-bit, first and second digital/analog converters in a predetermined synthesizing ratio corresponding to their corresponding bit positions.