← Back to Patent Explorer
US4942437A Expired / Lapsed US ⏱️ 0.0 years remaining

Electron tuned quantum well device

Assignee: International Business Machines Corp
•
Filing: 1989-01-13
•
Granted: 1990-07-17
•
Expires: 2009-01-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A quantum well type signal translating device is constructed by providing an appendage in which a reflected wave can be employed to introduce constructive or destructive interference in electron wave conduction at the heterojunction.

Inventors

  • 👤 Alan B. Fowler
  • 👤 Gregory L. Timp

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 06:35
CPC Classifications
B; B82; B82Y; B82Y10/00; H; H10; H10D; H10D48/00; H10D48/383; H10D30/00; H10D30/40; H10D30/43; H10N; H10N70/00; H10N70/10

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 181 words
In a signal translator which includes a single conducting path of given length on the surface of a semiconductor member of layers of Ga 1-x Al x As on GaAs said member having a heterojunction therein and a potential well containing electrons adjacent said heterojunction, said GaAs being undoped and separated from a substrate by a buffer layer of GaAs doped with Si to 10 17 atom/cm 3 and said Ga 1-x Al x As being undoped adjacent said heterojunction and having a region at the surface of Ga 0 .35 Al 0 .65 As doped with Si to 10 17 atoms/cm 3 , the improvement comprising a tunable stub having a length dimension (L) of 2000 Å connected to and extending from said path at a location along said given length and gate means having a width dimension (W) of 1000 Å for providing a localized electric field across said heterojunction under a portion of said tunable stub the latter having a length less than the means free path length for the scattering of electrons in said second semiconductor material.
Claim 2
Dependent Claim 181 words
In a signal translator which includes a single conducting path of given length on the surface of a semiconductor member of layers of Ga 1-x Al x As on GaAs said member having a heterojunction therein and a potential well containing electrons adjacent said heterojunction, said GaAs being undoped and separated from a substrate by a buffer layer of GaAs doped with Si to 10 17 atom/cm 3 and said Ga 1-x Al x As being undoped adjacent said heterojunction and having a region at the surface of Ga 0 .35 Al 0 .65 As doped with Si to 10 17 atoms/cm 3 , the improvement comprising a tunable stub having a length dimension (L) of 2000 Å connected to and extending from said path at a location along said given length and gate means having a width dimension (W) of 1000 Å for providing a localized electric field across said heterojunction under a portion of said tunable stub the latter having a length less than the means free path length for the scattering of electrons in said second semiconductor material.

References Cited (Backward Citations)

US4163237A Cited
JPS58147169A Cited
JPS5928383A Cited
US4550330A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-07-16 1994-01-15 1994-07-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-07-16 1998-01-15 1998-07-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-07-16 2002-01-15 2002-07-17 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag