US4935703A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low bias, high slew rate operational amplifier
Assignee: STMicroelectronics lnc USA
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Filing: 1989-05-31
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Granted: 1990-06-19
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Expires: 2009-05-31
Abstract
Abstract A bias current source for the output stage of an operational amplifier is controllable. The bias current generator senses the voltage differential on the differential operational amplifier inputs. When an input differential voltage is sensed which generates a rising output signal, additional bias current is provided to the output stage. When the output voltage is constant or falling, the bias current to the output stage is decreased.
Inventors
- 👤 Vanni Poletto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 22:14
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3069; H03F1/00; H03F1/02; H03F1/0205; H03F1/0261; H03F3/3071; H03F2203/00; H03F2203/30; H03F2203/30121; H03F2203/30144; H03F2203/45; H03F2203/45168
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
194 words
An operational amplifier, comprising: an input differential amplifier stage including parallel inverting and non-inverting input transistors connected to an inverting input and non-inverting input, respectively; an output amplifier stage for generating an output signal; means connected to said input stage and to said output stage for providing a first signal to said output stage which is proportional to the difference between signals applied to the inverting and non-inverting inputs; complementary first and second sensing transistors connected in series, and connected to the inverting and non-inverting input transistors respectively, for receiving signals therefrom; a first current mirror transistor connected in series with said sensing transistors; and a second current mirror transistor connected in parallel with said first current mirror transistor and in series with said output stage, wherein current flowing through said second current mirror transistor flows into said output stage to provide a bias current thereto, and wherein the current flowing through said second current mirror transistor has the same magnitude as a current flowing through said first current mirror transistor; wherein the current flowing through said first current mirror transistor is controlled by the signals applied to said first and second sensing transistors.
Claim 2
Dependent Claim
194 words
An operational amplifier, comprising: an input differential amplifier stage including parallel inverting and non-inverting input transistors connected to an inverting input and non-inverting input, respectively; an output amplifier stage for generating an output signal; means connected to said input stage and to said output stage for providing a first signal to said output stage which is proportional to the difference between signals applied to the inverting and non-inverting inputs; complementary first and second sensing transistors connected in series, and connected to the inverting and non-inverting input transistors respectively, for receiving signals therefrom; a first current mirror transistor connected in series with said sensing transistors; and a second current mirror transistor connected in parallel with said first current mirror transistor and in series with said output stage, wherein current flowing through said second current mirror transistor flows into said output stage to provide a bias current thereto, and wherein the current flowing through said second current mirror transistor has the same magnitude as a current flowing through said first current mirror transistor; wherein the current flowing through said first current mirror transistor is controlled by the signals applied to said first and second sensing transistors.
Claim 3
Dependent Claim
41 words
The operational amplifier of claim 1, wherein said first signal providing means comprises: an amplifying transistor connected to said input stage for amplifying a difference signal therefrom; and a capacitor connected to said amplifying transistor for providing a feedback path thereto.
Claim 4
Dependent Claim
48 words
The operational amplifier of claim 1 further comprising: an input stage constant current source connected to said input stage, wherein current from said constant current source is directed through the parallel input transistors according to the relative values of the sinals applied to the inverting and non-inverting inputs.
Claim 5
Dependent Claim
13 words
The operational amplifier of claim 1, wherein all transistors are bipolar junction transistors.
Claim 6
Dependent Claim
38 words
The operational amplifier of claim 1, wherein said first signal providing means comprises an amplifier with capacitive feedback, wherein the first signal is an integral of a difference between the signals applied to the inverting and non-inverting inputs.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-18 | 1993-12-18 | 1994-06-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-18 | 1997-12-18 | 1998-06-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-18 | 2001-12-18 | 2002-06-19 | $7700.00 | Window Closed / Lapsed |