US4931745A
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US
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Low noise chopper stabilized amplifier and method of operation
Assignee: Texas Instruments Inc
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Filing: 1988-12-22
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Granted: 1990-06-05
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Expires: 2008-12-22
Abstract
Abstract A chopper op amp (10) is provided having an input chopping waveform (70). Input chopping waveform E (70) is used to generate waveform C (76) and waveform D (78) for activating switch C (36) and switch D (38), respectively. The high period of waveforms C (76) and D (78) are reduced relative to the chopping waveform (70), thereby corresponding to a reduced duty cycle for chopper op amp (10). The period (88, 90) of chopping waveform (70) may be reduced below two milliseconds.
Inventors
- 👤 Larry Goff
- 👤 Lawrence A. King
- 👤 Daniel B. Barnett
- 👤 Samuel P. Justice
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 19:04
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/303
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
60 words
A chopper stabilized amplifier cycling at a clock period, comprising: a nulling amplifier; a main amplifier associated with said nulling amplifier to form the chopper stabilized amplifier; circuitry for generating a clock period including a first clock phase for correcting DC errors in said main amplifier, said first clock phase having a duration less than 20% of the clock period.
Claim 2
Dependent Claim
60 words
A chopper stabilized amplifier cycling at a clock period, comprising: a nulling amplifier; a main amplifier associated with said nulling amplifier to form the chopper stabilized amplifier; circuitry for generating a clock period including a first clock phase for correcting DC errors in said main amplifier, said first clock phase having a duration less than 20% of the clock period.
Claim 3
Dependent Claim
38 words
The chopper stabilized amplifier of claim 1 wherein said clock period includes a second clock phase for correcting DC errors in said nulling amplifier, said second clock phase of a duration less than 20% of the clock period.
Claim 4
Dependent Claim
32 words
The chopper stabilized amplifier of claim 1 and further including a plurality of switches for operating said nulling amplifier and said main amplifier in accordance with said first and second clock phases.
Claim 5
Dependent Claim
13 words
The chopper stabilized amplifier of claim 3 wherein said switches comprise transistor switches.
Claim 6
Dependent Claim
97 words
A chopper stabilized amplifier cycling at a clock period, comprising: a nulling amplifier; a main amplifier associated with said nulling amplifier to form the chopper stabilized amplifier; and circuitry for generating a clock period including a first clock phase for correcting DC errors in said main amplifier, and a second clock phase for correcting DC errors in said nulling amplifier, the first clock phase being of a duration less than or equal to 5% of the clock period, and the second clock phase being of a duration less than or equal to 5% of the clock period.
Claim 7
Dependent Claim
97 words
A chopper stabilized amplifier cycling at a clock period, comprising: a nulling amplifier; a main amplifier associated with said nulling amplifier to form the chopper stabilized amplifier; and circuitry for generating a clock period including a first clock phase for correcting DC errors in said main amplifier, and a second clock phase for correcting DC errors in said nulling amplifier, the first clock phase being of a duration less than or equal to 5% of the clock period, and the second clock phase being of a duration less than or equal to 5% of the clock period.
Claim 8
Dependent Claim
39 words
The chopper stabilized amplifier of claim 5, wherein the duration of said first clock phase substantially approaches zero percent of the clock period, and the duration of said second clock phase substantially approaches zero percent of the clock period.
Claim 9
Dependent Claim
16 words
The chopper stabilized amplifier of claim 1 wherein the clock period is less than two milliseconds.
Claim 10
Dependent Claim
75 words
A chopper stabilized amplifier having a clock operating over a clock period, comprising: a nulling amplifier; a main amplifier; a first clock phase for correcting DC errors in said nulling amplifier, said first clock phase occurring for a time less than 20% of the clock period; and a second clock phase for correcting DC errors in said main amplifier, said second clock phase occurring for for a time less than 20% of the clock period.
Claim 11
Dependent Claim
75 words
A chopper stabilized amplifier having a clock operating over a clock period, comprising: a nulling amplifier; a main amplifier; a first clock phase for correcting DC errors in said nulling amplifier, said first clock phase occurring for a time less than 20% of the clock period; and a second clock phase for correcting DC errors in said main amplifier, said second clock phase occurring for for a time less than 20% of the clock period.
Claim 12
Dependent Claim
30 words
The chopper stabilized amplifier of claim 8 and further including transistor switches for operating said nulling amplifier and said main amplifier in accordance with said first and second clock phases.
Claim 13
Dependent Claim
43 words
The chopper stabilized amplifier of claim 8 and further comprising: a first capacitor associated with said nulling amplifier for correcting DC errors of said nulling amplifier; and a second capacitor associated with said main amplifier for correcting DC errors of said main amplifier.
Claim 14
Dependent Claim
17 words
The chopper stabilized amplifier of claim 8 wherein the clock period is substantially less than two milliseconds.
Claim 15
Dependent Claim
90 words
A chopper stabilized amplifier cycling at a clock period comprising: a nulling amplifier; a main amplifier; a first clock period including a first clock phase for correcting DC errors in said nulling amplifier, said first clock phase having a duration less than 20% of the first clock period; a second clock phase for correcting DC errors in said main amplifier, said second clock phase having a duration less than 20% of the first clock period; and said clock period being less than two milliseconds in order to reduce aliasing problems.
Claim 16
Dependent Claim
90 words
A chopper stabilized amplifier cycling at a clock period comprising: a nulling amplifier; a main amplifier; a first clock period including a first clock phase for correcting DC errors in said nulling amplifier, said first clock phase having a duration less than 20% of the first clock period; a second clock phase for correcting DC errors in said main amplifier, said second clock phase having a duration less than 20% of the first clock period; and said clock period being less than two milliseconds in order to reduce aliasing problems.
Claim 17
Dependent Claim
19 words
The chopper stabilized amplifier of claim 12 and further including a clock period between fifty microseconds and two milliseconds.
Claim 18
Independent Claim
72 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over a clock period having a first phase; clocking the chopper stabilized amplifier over a clock period having a second phase; and maintaining said first phase for a time period shorter than 20% of said clock period.
Claim 19
Independent Claim
72 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over a clock period having a first phase; clocking the chopper stabilized amplifier over a clock period having a second phase; and maintaining said first phase for a time period shorter than 20% of said clock period.
Claim 20
Dependent Claim
33 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 14, and further including maintaining said second phase for a time period shorter than 20% of said clock period.
Claim 21
Independent Claim
95 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over a clock period having a first phase; clocking the chopper stabilized amplifier over a clock period having a second phase; maintaining said first phase for a time period equal to or less than five percent of said clock period; and maintaining said second phase for a time period equal to or less than five percent of said clock period.
Claim 22
Independent Claim
95 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over a clock period having a first phase; clocking the chopper stabilized amplifier over a clock period having a second phase; maintaining said first phase for a time period equal to or less than five percent of said clock period; and maintaining said second phase for a time period equal to or less than five percent of said clock period.
Claim 23
Dependent Claim
43 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 14, and further comprising: correcting the DC errors of the nulling amplifier with a null voltage; and correcting the DC errors of the main amplifier with a null voltage.
Claim 24
Dependent Claim
36 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 17, wherein said correcting steps further include storing said null voltages on capacitors associated with the nulling amplifier and the main amplifier.
Claim 25
Dependent Claim
30 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 14, and further including maintaining said clock period for a time substantially less than two milliseconds.
Claim 26
Independent Claim
70 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over two clock periods, a first period having a first phase and a second period having a second phase; and maintaining said first phase for a time period shorter than 20% of said clock period.
Claim 27
Independent Claim
70 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over two clock periods, a first period having a first phase and a second period having a second phase; and maintaining said first phase for a time period shorter than 20% of said clock period.
Claim 28
Dependent Claim
33 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 20, and further including maintaining said second phase for a time period shorter than 20% of said clock period.
Claim 29
Dependent Claim
32 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 20 and further including switching DC offset correction signals in accordance with said first and second clock phases.
Claim 30
Dependent Claim
34 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 20 and further including storing DC offset correction signals on capacitors associated with the nulling amplifier and the main amplifier.
Claim 31
Independent Claim
82 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over two clock periods, a first clock period having a first phase and a second clock period having a second phase; and maintaining said first phase and said second phase for a time period equal to or less than five percent of one of said clock periods.
Claim 32
Independent Claim
82 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over two clock periods, a first clock period having a first phase and a second clock period having a second phase; and maintaining said first phase and said second phase for a time period equal to or less than five percent of one of said clock periods.
Claim 33
Dependent Claim
30 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 20 and further including maintaining the clock period for a time substantially less than two milliseconds.
Claim 34
Independent Claim
99 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over a two clock periods, a first clock period having a first phase and a second clock period having a second phase; maintaining said clock period for a time shorter than two milliseconds; and maintaining said first phase and said second phase for a time equal to or less than five percent of one of said first clock period or said second clock period.
Claim 35
Independent Claim
99 words
A method for amplifying an electrical signal with a chopper stabilized amplifier including a nulling amplifier and a main amplifier, comprising: inputting the electrical signal into the chopper stabilized amplifier; clocking the chopper stabilized amplifier over a two clock periods, a first clock period having a first phase and a second clock period having a second phase; maintaining said clock period for a time shorter than two milliseconds; and maintaining said first phase and said second phase for a time equal to or less than five percent of one of said first clock period or said second clock period.
Claim 36
Dependent Claim
28 words
The method for amplifying an electrical signal with a chopper stabilized amplifier of claim 26 and further including maintaining said clock period between fifty microseconds and two milliseconds.
References Cited (Backward Citations)
US4048574A
Cited
US4450368A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-04 | 1993-12-04 | 1994-06-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-04 | 1997-12-04 | 1998-06-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-04 | 2001-12-04 | 2002-06-05 | $7700.00 | Window Closed / Lapsed |