US4929888A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pin electronics device having a phase adjustment function for IC testers and phase adjustment method therefor
Assignee: Advantest Corp
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Filing: 1989-08-23
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Granted: 1990-05-29
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Expires: 2009-08-23
Abstract
Abstract A pin electronics device for an IC tester, in which there are provided for each terminal of an IC under test a channel including a driver for applying a drive pulse to the terminal and a logical comparator for determining and holding the logic of a response signal from the terminal, and a difference between the delay of the path from a common reference strobe pulse output terminal to a strobe terminal of the logical comparator of each channel and the set-up time of the logical comparator is preset to be equal for all the channels. The drive pulse from the driver is determined in logic by the logical comparator at the timing of a reference strobe pulse, then the phase of the drive pulse is adjusted by a first variable delay element so that the reference strobe pulse may coincide with an edge of the drive pulse, and the phase adjusted drive pulse is provided to the logical comparator. At the same time, a strobe signal is applied to the logical comparator and the phase of the strobe signal is adjusted by a second variable delay element so that the edge of the drive pulse may coincide with the strobe signal.
Inventors
- 👤 Kenji Yoshida
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 22:54
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/31903; G01R31/31908; G01R31/3191
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
173 words
A pin electronics device comprising: a driver provided for each of a plurality of channels, for supplying a drive signal to the corresponding terminal of an IC under test; a logical comparator means provided in said each channel, which has an input connected to the output of said driver, receives a response signal from said corresponding terminal of said IC under test, and determines the logic of its level; a first variable delay means provided in said each channel, for adjusting the phase of said drive signal which is output from said driver in said each channel; a second variable delay means inserted in a path for applying therethrough a reference strobe signal from a common reference strobe output terminal to a strobe terminal of said logical comparator means of said each channel, for adjusting the phase of said reference strobe signal; and a third variable delay means provided in said each channel, for adjusting the phase of a strobe pulse which is applied to said strobe terminal of said logical comparator means.
Claim 2
Dependent Claim
173 words
A pin electronics device comprising: a driver provided for each of a plurality of channels, for supplying a drive signal to the corresponding terminal of an IC under test; a logical comparator means provided in said each channel, which has an input connected to the output of said driver, receives a response signal from said corresponding terminal of said IC under test, and determines the logic of its level; a first variable delay means provided in said each channel, for adjusting the phase of said drive signal which is output from said driver in said each channel; a second variable delay means inserted in a path for applying therethrough a reference strobe signal from a common reference strobe output terminal to a strobe terminal of said logical comparator means of said each channel, for adjusting the phase of said reference strobe signal; and a third variable delay means provided in said each channel, for adjusting the phase of a strobe pulse which is applied to said strobe terminal of said logical comparator means.
Claim 3
Dependent Claim
56 words
The pin electronics device of claim 1 wherein a difference between the amount of delay in said path from said common reference strobe output terminal to said strobe terminal of said logical comparator means of said each channel and a set-up time of said logical comparator means is set to be the same for all channels.
Claim 4
Dependent Claim
41 words
The pin electronics device of claim 2 wherein the outputs of said second and third variable delay means in said each channels are connected via an OR gate to said strobe terminal of said logical comparator means in the same channel.
Claim 5
Dependent Claim
92 words
The pin electronics device of claim 2 wherein said logical comparator means in said each channel includes a logical comparator which has an input connected to the output of said driver corresponding thereto and a first strobe terminal for receiving the output of said second variable delay means corresponding thereto, and a hold means which is connected to the output of said logical comparator and holds the result of comparison by said logical comparator in response to said strobe pulse which is applied from the output of said third variable delay means.
Claim 6
Dependent Claim
41 words
The pin electronics device of claim 1 wherein the outputs of said second and third variable delay means in said each channels are connected via an OR gate to said strobe terminal of said logical comparator means in the same channel.
Claim 7
Dependent Claim
92 words
The pin electronics device of claim 1 wherein said logical comparator means in said each channel includes a logical comparator which has an input connected to the output of said driver corresponding thereto and a first strobe terminal for receiving the output of said second variable delay means corresponding thereto, and a hold means which is connected to the output of said logical comparator and holds the result of comparison by said logical comparator in response to said strobe pulse which is applied from the output of said third variable delay means.
Claim 8
Dependent Claim
210 words
A phase adjustment method for a pin electronics device which is equipped with plurality of drivers and a plurality of logical comparators and in which said drivers each provide a drive signal to the corresponding terminal of an IC under test and a response output signal from each terminal of said IC under test is determined in level by the corresponding logical comparator at the timing of supply of a strobe pulse and then input into an IC tester, said method comprising: a step wherein a reference strobe pulse is applied to all of said logical comparators, and at the same time, a drive pulse is applied from each of said drivers to the corresponding logical comparator and then a variable delay element connected in cascade to said driver is adjusted so that said reference strobe pulse coincides with an edge of said drive pulse, whereby the phase of said drive pulse is adjusted; and a step wherein said adjusted drive pulse from said each driver is regarded as a reference signal and the phase of a strobe pulse to be applied to the corresponding logical comparator is adjusted so that a strobe signal to be applied to said each logical comparator coincides with an edge of said reference signal.
Claim 9
Dependent Claim
210 words
A phase adjustment method for a pin electronics device which is equipped with plurality of drivers and a plurality of logical comparators and in which said drivers each provide a drive signal to the corresponding terminal of an IC under test and a response output signal from each terminal of said IC under test is determined in level by the corresponding logical comparator at the timing of supply of a strobe pulse and then input into an IC tester, said method comprising: a step wherein a reference strobe pulse is applied to all of said logical comparators, and at the same time, a drive pulse is applied from each of said drivers to the corresponding logical comparator and then a variable delay element connected in cascade to said driver is adjusted so that said reference strobe pulse coincides with an edge of said drive pulse, whereby the phase of said drive pulse is adjusted; and a step wherein said adjusted drive pulse from said each driver is regarded as a reference signal and the phase of a strobe pulse to be applied to the corresponding logical comparator is adjusted so that a strobe signal to be applied to said each logical comparator coincides with an edge of said reference signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-05-28 | 1993-11-27 | 1994-05-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-05-28 | 1997-11-27 | 1998-05-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-05-28 | 2001-11-27 | 2002-05-29 | $7700.00 | Window Closed / Lapsed |