← Back to Patent Explorer
US4929564A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for producing compound semiconductor single crystals and method for producing compound semiconductor devices

Assignee: Nippon Mining Holdings Inc
•
Filing: 1989-10-16
•
Granted: 1990-05-29
•
Expires: 2009-10-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The present invention relates to a method for producing InP single crystals containing impurities such as Fe, Co, Ti, Cr or the like by cutting the single crystals into wafers or blocks and heat-treating the cut wafers or blocks at temperatures ranging from 400° C. to 690° C. Further, the invention is related to a method for producing compound semiconductor devices employing Fe-doped InP single crystals as the substrate of the device. In this method, the InP single crystals are cut into wafers and the cut wafers are heat-treated at temperatures ranging from 400° C. to 690° C. Further, the wafers are implanted with ions and heat-treated at 690° C. or lower to activate the implanted ions. These methods ensure to produce the single crystals and the compound semiconductor devices which have superior electrical properties.

Inventors

  • 👤 Keiji Kainosho
  • 👤 Haruhito Shimakura
  • 👤 Osamu Oda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 14:49
CPC Classifications
C; C30; C30B; C30B33/00; C30B29/00; C30B29/10; C30B29/40

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 69 words
A method for producing compound semiconductor single crystals comprising; (a) cutting step for cutting an ingot of a compound semiconductor single crystal containing at least one of impurities such as Fe, Co, Ti and Cr into wafers or blocks; and (b) a heat-treating step for heat-treating the wafers or the blocks installed in an evacuated and sealed quartz ampoule at the temperatures ranging from 400° C. to 690° C.
Claim 2
Independent Claim 69 words
A method for producing compound semiconductor single crystals comprising; (a) cutting step for cutting an ingot of a compound semiconductor single crystal containing at least one of impurities such as Fe, Co, Ti and Cr into wafers or blocks; and (b) a heat-treating step for heat-treating the wafers or the blocks installed in an evacuated and sealed quartz ampoule at the temperatures ranging from 400° C. to 690° C.
Claim 3
Dependent Claim 69 words
The method according to claim 1, wherein said heat-treating step is characterized that said wafers or said blocks are installed in said evacuated and sealed quartz ampoule with a compositional element of said compound semiconductor single crystal or other compound semiconductor material composed of said compositional element and the inner pressure of said quartz ampoule is increased to at least the dissociation pressure of said compound semiconductor single crystal.
Claim 4
Dependent Claim 16 words
The method according to claim 1, wherein said compound semiconductor single crystal is InP single crystal.
Claim 5
Independent Claim 72 words
A method for producing compound semiconductor devices comprising; (a) a heat-treatment step for heat-treating the wafers of a Fe-doped InP single crystal at temperatures ranging from 400° C. to 690° C.; (b) a mirror surface polishing step for polishing said heat-treated wafers; (c) an ion implantation step for implanting ions into said polished wafers; and (d) an activating heat-treatment step for heat-treating said wafers at the temperature of 690° C. or lower.
Claim 6
Independent Claim 72 words
A method for producing compound semiconductor devices comprising; (a) a heat-treatment step for heat-treating the wafers of a Fe-doped InP single crystal at temperatures ranging from 400° C. to 690° C.; (b) a mirror surface polishing step for polishing said heat-treated wafers; (c) an ion implantation step for implanting ions into said polished wafers; and (d) an activating heat-treatment step for heat-treating said wafers at the temperature of 690° C. or lower.

References Cited (Backward Citations)

JPS56112723A Cited
US4357180A Cited
US4676840A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-05-28 1993-11-27 1994-05-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-05-28 1997-11-27 1998-05-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-05-28 2001-11-27 2002-05-29 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag