Synchronizing circuit for optical scanning apparatus

Claim 2

A synchronizing circuit for an optical scanning apparatus in which synchronization of writing of an image in the horizontal direction is achieved using a synchronizing signal generated in response to the output of an photo sensor for detecting the light which has passed through a scanning means, comprising: an oscillator for generating a series of clock pulses having a predetermined frequency; a frequency dividing circuit for dividing the frequency of the clock pulse train generated from said oscillator when a signal is output from said photo sensor; a delay circuit for successively delaying the phase of the clock pulse train having the frequency divided by said frequency dividing circuit by a predetermined time interval; and a selecting circuit for selecting as a synchronizing signal the output of said delay circuit whose phase difference is at a minimum with respect to the output of said photo sensor.

Claim 3

A synchronizing circuit for an optical scanning apparatus according to claim 1, further including a delay means for producing a predetermined time interval between a signal imposed on its input from said photo sensor and the appearance of the same signal at its output; and a phase difference detecting circuit for receiving the output of said delay circuit and the output of said delay means and for outputting a phase difference determining signal to said selecting circuit so as to allow it to select as a synchronizing circuit an output of said delay circuit whose phase difference is at a minimum with respect to the output of said photo sensor.

Claim 4

A synchronizing circuit for an optical scanning apparatus according to claim 2, wherein said phase difference detecting circuit is adpated to output a first phase difference determining signal in response to detection of an output signal from said delay circuit whose phase difference is at a minimum with respect to the output signal from said delay means, as well as a second phase difference determining signal which is different from said first phase difference determining signal and which is output in response to detection of another output signals from said delay circuit.

Claim 5

A synchronizing circuit for an optical scanning apparatus according to claim 3, wherein said first phase difference determining signal comprises a logical 1 signal while said second phase difference determining signal comprises a logical 0 signal.

Claim 6

A synchronizing circuit for an optical scanning apparatus according to claim 3, wherein said selecting circuit performs the AND operation on the output signals of said phase difference detecting circuit and the output signals of said delay circuit so as to select the output of said delay circuit which is most closest in phase.

Claim 7

A synchronizing circuit for an optical scanning apparatus according to claim 1, wherein said frequency dividing circuit starts to divide the frequency of said clock pulse train when said clock pulse train emerges.

Claim 8

A synchronizing signal generating circuit applied to an optical scanning apparatus, said synchronizing signal generating circuit generating a synchronizing signal used to achieve synchronization of writing of an image in the horizontal direction in response to a signal output from a photo sensor which outputs a signal when it detects a light moved in the horizontal scanning direction by a horizontal scanning means, comprising: an oscillator for generating a series of clock pulses having a predetermined frequency; a frequency dividing circuit for receiving the output signal of said photo sensor and the clock pulse train and for dividing the frequency of said clock pulse train to a predetermined value when it receives the output signal of said photo sensor; a delay circuit for receiving the clock pulse train whose frequency has been divided and for successively delaying the position of said clock pulse train by a predetermined time interval when it produces output signals; a delay element for receiving the output signal of said photo sensor and for producing a predetermined time interval between input said signal of said photo sensor and the appearance of the same signal at its output; a phase difference detecting circuit for receiving the output signal of said delay circuit and the output signal of said delay element and for outputting a phase difference determining signal when it detects among the output signals of said delay circuit the output signal whose phase difference is at a minimum with respect to the output signal of said delay element; and a selecting circuit for receiving the output signals of said delay circuit and said phase difference determining signal and for selecting among the output signals of said delay circuit said output signal which is most closest in phase on the basis of said phase difference determining signal.

Claim 9

A synchronizing signal generating circuit applied to an optical scanning apparatus, said synchronizing signal generating circuit generating a synchronizing signal used to achieve synchronization of writing of an image in the horizontal direction in response to a signal output from a photo sensor which outputs a signal when it detects a light moved in the horizontal scanning direction by a horizontal scanning means, comprising: an oscillator for generating a series of clock pulses having a predetermined frequency; a frequency dividing circuit for receiving the output signal of said photo sensor and the clock pulse train and for dividing the frequency of said clock pulse train to a predetermined value when it receives the output signal of said photo sensor; a delay circuit for receiving the clock pulse train whose frequency has been divided and for successively delaying the position of said clock pulse train by a predetermined time interval when it produces output signals; a delay element for receiving the output signal of said photo sensor and for producing a predetermined time interval between input said signal of said photo sensor and the appearance of the same signal at its output; a phase difference detecting circuit for receiving the output signal of said delay circuit and the output signal of said delay element and for outputting a phase difference determining signal when it detects among the output signals of said delay circuit the output signal whose phase difference is at a minimum with respect to the output signal of said delay element; and a selecting circuit for receiving the output signals of said delay circuit and said phase difference determining signal and for selecting among the output signals of said delay circuit said output signal which is most closest in phase on the basis of said phase difference determining signal.

Claim 10

A synchronizing signal generating circuit for use in an optical scanning apparatus according to claim 7, wherein said phase difference detecting circuit is adpated to output a first phase difference determining signal in response to detection of the output signal from said delay circuit whose phase difference is at a minimum with respect to the output signal from said delay element, as well as a second phase difference determining signal which is different from said first phase difference determining signal and which is output in response to detection of another output signals from said delay circuit.

Claim 11

A synchronizing signal generating circuit for use in an optical scanning apparatus according to claim 8, wherein said first phase difference determining signal comprises a logical 1 signal while said second phase difference determining signal comprises a logical 0 signal.

Claim 12

A synchronizing circuit for an optical scanning apparatus according to claim 8, wherein said selecting circuit performs the AND operation on the output signals of said phase difference detecting circuit and the output signals of said delay circuit so as to select the output of said delay circuit which is most closest in phase.

Claim 13

A synchronizing circuit for an optical scanning apparatus according to claim 7, wherein said frequency dividing circuit starts to divide the frequency of said clock pulse train when said clock pulse train emerges.