High-accuracy A/D converter

Claim 2

A high-accuracy A/D converter comprising: digital signal generation means which generates a digital signal; a D/A conversion circuit which performs D/A conversion for the signal provided by said digital signal generation means; a sample-holding circuit which samples and holds the output signal of said D/A conversion circuit; an input terminal for an input signal to be rendered A/D conversion; a subtracting-amplifying circuit which performs subtraction selectively between the output signal of said D/A conversion circuit and the output signal of said sample-holding circuit or between the output signal of said D/A conversion circuit and the input signal from said input terminal, and amplifies the subtracted signal; a switching circuit which selects one of the signal from said subtracting-amplifying circuit and the input signal from said input terminal; and an A/D conversion circuit which performs A/D conversion for the signal from said switching circuit.

Claim 3

An A/D converter according to claim 1, wherein said subtracting-amplifying circuit comprises: a first subtraction circuit which performs subtraction for the signal from said D/A conversion circuit and the signal from said sample-holding circuit; first means for interrupting said subtracting-amplifying circuit between said sample-holding circuit and said first subtraction circuit; a second subtracting-amplifying circuit which performs subtraction for the signal from said first subtraction circuit and the input signal from said input terminal, and amplifies the result of subtraction; and second means for interrupting said subtracting-amplifying circuit between said input terminal and said second subtracting-amplifying circuit.

Claim 4

An A/D converter according to claim 2, wherein said second subtracting-amplifying circuit comprises: a second subtraction circuit which performs subtraction for the signal from said first subtraction circuit and the input signal from said input terminal; and an amplifier which amplifies the signal from said second subtraction circuit.

Claim 5

An A/D converter according to claim 3, wherein said amplifier comprises a circuit which performs 128-fold amplification.

Claim 6

An A/D converter according to claim 1, wherein said subtracting-amplifying circuit comprises: selection means which selects one of the output signal of said sample-holding circuit and the input signal from said input terminal; and a subtracting-amplifier which performs subtraction for the output signal from said D/A conversion circuit and the signal from said selection means.

Claim 7

An A/D converter according to claim 1, wherein said digital signal generation means comprises means for generating an arbitrary digital value which can be converted by said D/A conversion circuit.

Claim 8

An A/D converter according to claim 6 further comprising a memory which stores the output signal of said A/D conversion circuit.

Claim 9

An A/D converter according to claim 7, wherein said subtracting-amplifying circuit performs subtraction between the signal from said sample-holding circuit which holds the signal produced by said D/A conversion circuit for an arbitrary digital signal provided by said digital signal generation circuit and the signal from said D/A conversion circuit, and amplifies the result of subtraction to detect an error, and wherein said A/D conversion circuit performs A/D conversion for the signal representing the error, said A/D converter further comprising means for storing the signal from said A/D conversion circuit in said memory.

Claim 10

An A/D converter according to claim 8 wherein said digital signal generation means introduces digital values from 0 to a specified value within the conversion range of said D/A conversion circuit by incrementing the value one at a time, and wherein said sample-holding circuit holds each value converted by said D/A conversion circuit for each digital value provided by said digital signal generation means, and wherein said subtracting-amplifying circuit subtracts, from the signal from said D/A conversion circuit, the signal which is smaller by one in digital value than said signal from D/A conversion circuit and is held in said sample-holding circuit, and wherein said A/D conversion circuit performs A/D conversion for the signal from said subtracting-amplifying circuit, said A/D converter further comprising means for correcting the signal from said A/D conversion circuit using the error signal stored in said memory, and means for evaluating a digital value by adding the corrected signal provided by said correction means to a digital value which is previously evaluated for a value smaller in digital value by one than a signal which is introduced into said D/A conversion circuit.

Claim 11

An A/D converter according to claim 9 further comprising: converting-storage means which operates on said A/D conversion circuit to perform A/D conversion for the input signal from said input terminal and stores the result in said memory; reading-conversion means which reads out a plurality of high-order bits of said digital value stored in said memory in accordance with the signal stored by said converting-storage means, and operates on said D/A conversion circuit to convert the readout bits into an analog value; subtracting-conversion means which operates on said subtracting-amplifying circuit to subtract the analog value read out by said reading-conversion means from said input signal, amplifies the result of subtraction, and operates on said A/D conversion circuit to perform A/D conversion for the amplified value; and adding means which adds the high-order bits stored in said memory to the signal from said subtracting-conversion means.